Overview
- Provides readers with timely, systematic and comprehensive treatments of statistical modeling and analysis of VLSI systems with a focus on interconnects, on-chip power grids and clock networks, and analog/mixed-signal circuits
- Helps chip designers understand the potential and limitations of their design tools, improving their design productivity
- Presents analysis of each algorithm with practical applications in the context of real circuit design
- Includes numerical examples for the quantitative analysis and evaluation of algorithms presented
- Includes supplementary material: sn.pub/extras
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About this book
Since process variation and chip performance uncertainties have become more pronounced as technologies scale down into the nanometer regime, accurate and efficient modeling or characterization of variations from the device to the architecture level have become imperative for the successful design of VLSI chips.
This book provides readers with tools for variation-aware design methodologies and computer-aided design (CAD) of VLSI systems, in the presence of process variations at the nanometer scale. It presents the latest developments for modeling and analysis, with a focus on statistical interconnect modeling, statistical parasitic extractions, statistical full-chip leakage and dynamic power analysis considering spatial correlations, statistical analysis and modeling for large global interconnects and analog/mixed-signal circuits.Â
- Provides readers with timely, systematic and comprehensive treatments of statistical modeling and analysis of VLSI systems with a focus on interconnects, on-chip power grids and clock networks, and analog/mixed-signal circuits;
- Helps chip designers understand the potential and limitations of their design tools, improving their design productivity;
- Presents analysis of each algorithm with practical applications in the context of real circuit design;
- Includes numerical examples for the quantitative analysis and evaluation of algorithms presented.Â
- Provides readers with timely, systematic and comprehensive treatments of statistical modeling and analysis of VLSI systems with a focus on interconnects, on-chip power grids and clock networks, and analog/mixed-signal circuits;
- Helps chip designers understand the potential and limitations of their design tools, improving their design productivity;
- Presents analysis of each algorithm with practical applications in thecontext of real circuit design;
- Includes numerical examples for the quantitative analysis and evaluation of algorithms presented.Â
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Keywords
Table of contents (17 chapters)
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FUNDAMENTALS
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STATISTICAL FULL CHIP POWER ANALYSIS
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STATISTICALINTERCONNECTMODELINGAND EXTRACTIONS
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STATISTICAL ANALOG AND YIELD ANALYSIS AND OPTIMIZATION TECHNIQUES
Authors and Affiliations
Bibliographic Information
Book Title: Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs
Authors: Ruijing Shen, Sheldon X.-D. Tan, Hao Yu
DOI: https://doi.org/10.1007/978-1-4614-0788-1
Publisher: Springer New York, NY
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer Science+Business Media, LLC 2012
Hardcover ISBN: 978-1-4614-0787-4Published: 18 March 2012
Softcover ISBN: 978-1-4899-8787-7Published: 13 April 2014
eBook ISBN: 978-1-4614-0788-1Published: 08 July 2014
Edition Number: 1
Number of Pages: XXX, 306
Topics: Circuits and Systems, Computer-Aided Engineering (CAD, CAE) and Design, Nanotechnology and Microengineering