Abstract
In this chapter, we present a novel scalable statistical simulation approach for large power grid network analysis considering process variations[92]. The new algorithm is very scalable for large networks with a large number of random variables. Our work is inspired by the recent work on variational model order reduction using fast balanced truncation method (called variational Poor man’s TBR method, or varPMTBR [134]). The new method, called varETBR, is based on the recently proposed ETBR method[9394]. To consider the variational parameters, we extend the concept of response Gramian, which was used in ETBR to compute the reduction projection subspace, to the variational response Gramian. Then MC-based numerical integration is employed to multiple-dimensional integrals. Different from traditional reduction approaches, varETBR calculates the variational response Gramians, considering both system and input source variations, to generate the projection subspace. In this way, much more efficient reduction can be performed for interconnects with massive terminals like power grid networks[177]. Furthermore, the new method is based on the globally more accurate balanced truncation reduction method instead of the less accurate Krylov subspace method as in EKS/IEKS[191,89].
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Notes
- 1.
Practically, the interesting frequency range is always bounded.
References
I. A. Ferzli and F. N. Najm, “Statistical estimation of leakage-induced power grid voltage drop considering within-die process variations,” in Proc. IEEE/ACM Design Automation Conference (DAC), 2003, pp. 865–859.
K. Glover, “All optimal Hankel-norm approximations of linear multi-variable systems and their L ∞ error bounds”,” Int. J. Control, vol. 36, pp. 1115–1193, 1984.
Y. Lee, Y. Cao, T. Chen, J. Wang, and C. Chen, “HiPRIME: Hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery,” IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 24, no. 6, pp. 797–806, 2005.
D. Li and S. X.-D. Tan, “Statistical analysis of large on-chip power grid networks by variational reduction scheme,” Integration, the VLSI Journal, vol. 43, no. 2, pp. 167–175, April 2010.
D. Li, S. X.-D. Tan, G. Chen, and X. Zeng, “Statistical analysis of on-chip power grid networks by variational extended truncated balanced realization method,” in Proc. Asia South Pacific Design Automation Conf. (ASPDAC), Jan 2009, pp. 272–277.
D. Li, S. X.-D. Tan, and B. McGaughy, “ETBR: Extended truncated balanced realization method for on-chip power grid network analysis,” in Proc. Design, Automation and Test In Europe. (DATE), 2008, pp. 432–437.
D. Li, S. X.-D. Tan, E. H. Pacheco, and M. Tirumala, “Fast analysis of on-chip power grid circuits by extended truncated balanced realization method,” IEICE Trans. on Fundamentals of Electronics, Communications and Computer Science(IEICE), vol. E92-A, no. 12, pp. 3061–3069, 2009.
N. Mi, S. X.-D. Tan, Y. Cai, and X. Hong, “Fast variational analysis of on-chip power grids by stochastic extended krylov subspace method,” IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 11, pp. 1996–2006, 2008.
N. Mi, S. X.-D. Tan, P. Liu, J. Cui, Y. Cai, and X. Hong, “Stochastic extended Krylov subspace method for variational analysis of on-chip power grid networks,” in Proc. Int. Conf. on Computer Aided Design (ICCAD), 2007, pp. 48–53.
B. Moore, “Principal component analysis in linear systems: Controllability, and observability, and model reduction,” IEEE Trans. Automat. Contr., vol. 26, no. 1, pp. 17–32, 1981.
S. R. Nassif, “Power grid analysis benchmarks,” in Proc. Asia South Pacific Design Automation Conf. (ASPDAC), 2008, pp. 376–381.
J. R. Phillips and L. M. Silveira, “Poor man’s TBR: a simple model reduction scheme,” IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 24, no. 1, pp. 43–55, 2005.
L. T. Pillage, R. A. Rohrer, and C. Visweswariah, Electronic Circuit and System Simulation Methods. New York: McGraw-Hill, 1994.
R. W. Shonkwiler and L. Lefton, An introduction to parallel and vector scientific computing. Cambridge University Press, 2006.
E. Suli and D. Mayers, An Introduction to Numerical Analysis. Cambridge University, 2006.
S. X.-D. Tan and L. He, Advanced Model Order Reduction Techniques in VLSI Design. Cambridge University Press, 2007.
“Umfpack,” http://www.cise.ufl.edu/research/sparse/umfpack/.
J. M. Wang and T. V. Nguyen, “Extended Krylov subspace method for reduced order analysis of linear circuit with multiple sources,” in Proc. IEEE/ACM Design Automation Conference (DAC), 2000, pp. 247–252.
D. Xiu and G. Karniadakis, “The Wiener-Askey polynomial chaos for stochastic differential equations,” SIAM J. Scientific Computing, vol. 24, no. 2, pp. 619–644, Oct 2002.
H. Zhu, X. Zeng, W. Cai, J. Xue, and D. Zhou, “A sparse grid based spectral stochastic collocation method for variations-aware capacitance extraction of interconnects under nanometer process technology,” in Proc. Design, Automation and Test In Europe. (DATE), Mar 2007, pp. 1514–1519.
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Shen, R., Tan, S.XD., Yu, H. (2012). Statistical Power Grid Analysis by Variational Subspace Method. In: Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs. Springer, Boston, MA. https://doi.org/10.1007/978-1-4614-0788-1_10
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