Abstract
In this work, the failure behavior of a commercial chip size packaging (CSP) with flip chip solder joint was investigated under the coupling condition of thermal cycling and electrical current. The damage behavior of solder joint was real-time monitored through the electrical resistance response. The microstructure evolution under the coupling condition were observed. The failure was classified as three modes, i.e., the cracking within solder on the PCB side (mode I), the cracking along the solder/IMC interface (mode II) and the detachment between the solder and chip due to the complete dissolving of Cu UBM layer (mode III). At low current density the mode I accounted for a large percentage while the mode II and mode III accounted for a large percentage at high current density. Based on the Weibull distribution of failure life, it was found that the mean time to failure sharply decreased with the increasing current density. A lifetime prediction model was constructed for the reliability test under coupling condition of thermal cycling and electrical current.
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Acknowledgements
This study was financially supported by the National Natural Science Foundation of China (NSFC), under the Grant No. 51471180 and No. 51101161, and Science and Technology Program of Shenyang, under the Grant No. F16-205-1-18.
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Zhu, Q.S., Gao, F., Ma, H.C. et al. Failure behavior of flip chip solder joint under coupling condition of thermal cycling and electrical current. J Mater Sci: Mater Electron 29, 5025–5033 (2018). https://doi.org/10.1007/s10854-017-8464-3
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DOI: https://doi.org/10.1007/s10854-017-8464-3