IEEE-Compliant IDCT on FPGA-Augmented TriMedia Mihai SimaSorin CotţofanáKees Vissers OriginalPaper 01 March 2005 Pages: 195 - 212
Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey Alireza ShoaShahram Shirani OriginalPaper 01 March 2005 Pages: 213 - 235
Adaptive-Hierarchical-Filtering Technique for High-Quality Magazine Image Reproduction Tsung Nan LinJoseph Shu OriginalPaper 01 March 2005 Pages: 237 - 247
A New Real Time Object Segmentation and Tracking Algorithm and its Parallel Hardware Architecture Mahmound MeriboutMamoru Nakanishi OriginalPaper 01 March 2005 Pages: 249 - 266
Digital Signal Processing with Interleaved ADC Systems Yih-Chyun Jenq OriginalPaper 01 March 2005 Pages: 267 - 271
Combining Extended Retiming and Unfolding for Rate-Optimal Graph Transformation Timothy W. O’NeilEdwin H.-M. Sha OriginalPaper 01 March 2005 Pages: 273 - 293
Parallel-Beam Backprojection: An FPGA Implementation Optimized for Medical Imaging Miriam LeeserSrdjan CoricMarc Trepanier OriginalPaper 01 March 2005 Pages: 295 - 311
A New Low Latency Parallel FIR Filter Scheme Paraskevas KalivasVassilis VassilakisKiamal Z. Pekmestzi OriginalPaper Pages: 313 - 322
Pipelined IIR Filter Architecture Using Pole-Radius Minimization Nigel Boston OriginalPaper Pages: 323 - 331