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Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey

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Abstract

Today’s digital signal processing (DSP) applications use computationally complex and/or adaptive algorithms and have stringent requirements in terms of speed, size, cost, power consumption, and throughput. Efficient hardware implementation techniques should be employed to meet the requirements of these applications. Run-Time Reconfiguration (RTR) is a promising technique for reducing the hardware required for implementing DSP systems as well as improving the performance, speed and power consumption of these systems. In this survey, we explain different issues in run-time reconfigurable systems and list the implemented systems which support run-time reconfiguration. We also describe different applications of run-time reconfiguration and discuss the improvements achieved by applying run-time reconfiguration.

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Authors and Affiliations

  1. Department of Electrical and Computer Eng., McMaster University, Hamilton, Canada

    Alireza Shoa & Shahram Shirani

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  1. Alireza Shoa
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  2. Shahram Shirani
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Correspondence to Alireza Shoa.

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Alireza Shoa received his B.Sc degree in Electrical Engineering from Sharif University of Technology, Tehran, Iran in 2001 and M.A.Sc degree in Electrical Engineering from McMaster University, Hamilton, Canada in 2003. Currently, he is a PhD candidate in Electrical Engineering at McMaster University. His research interests include VLSI circuits for signal processing and communication applications and image and video processing.

Shahram Shirani received his B.S. in Electrical Engineering from Isfahan University of Technology, Isfahan, Iran, and M.Sc. in Biomedical Engineering from Amirkabir University of Technology, Tehran, Iran, and Ph.D. in Electrical Engineering from University of British Columbia, Vancouver, Canada, in 1989, 1994 and 2000 respectively. Since 2000 he has been with the department of Electrical and Computer Engineering, McMaster University, where he is an assistant professor. His research interests include image and video compression, multimedia communications, and ultrasonic imaging. He is a member of technical committee of IEEE International Conference on Image Processing (ICIP). He is a licensed professional engineer and a member of Institute of Electrical and Electronics Engineers (IEEE).

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Shoa, A., Shirani, S. Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey. J VLSI Sign Process Syst Sign Image Video Technol 39, 213–235 (2005). https://doi.org/10.1007/s11265-005-4841-x

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  • DOI: https://doi.org/10.1007/s11265-005-4841-x

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