Guest Editors' Introduction Wayne P. BurlesonKonstantinos Konstantinides Legacy 01 February 1998 Pages: 87 - 88
System-Level Power Optimization of Video Codecs on Embedded Cores: A Systematic Approach Lode NachtergaeleDennis MoolenaarHugo De Man OriginalPaper 01 February 1998 Pages: 89 - 109
Reducing Data Hazards on Multi-pipelined DSP Architecture with Loop Scheduling Sissades TongsimaChantana ChantrapornchaiNelson L. Passos OriginalPaper 01 February 1998 Pages: 111 - 123
A Vlsi Architecture for Separable 2-D Discrete Wavelet Transform Jimmy C. LimquecoMagdy A. Bayoumi OriginalPaper 01 February 1998 Pages: 125 - 140
Vlsi Array Architectures for Pyramid Vector Quantization Bongjin JungWayne P. Burleson OriginalPaper 01 February 1998 Pages: 141 - 154
Single Chip Dual–Issue RISC Processor for Real–Time MPEG–2 Software Decoding Edgar HolmannToyohiko YoshidaShin–ichi Uramoto OriginalPaper 01 February 1998 Pages: 155 - 165
An Area-Effective Cell-Based Channel Decoder LSI For a Digital Satellite TV Broadcasting Takehiro KamadaToshihiko FukuokaKazuhiro Ota OriginalPaper 01 February 1998 Pages: 167 - 175
A Low Power DSP Engine for Wireless Communications Ingrid VerbauwhedeMihran Touriguian OriginalPaper 01 February 1998 Pages: 177 - 186
Low Power Digital Frequency Conversion Architectures Patrick SchaumontSerge VernaldeIvo Bolsens OriginalPaper 01 February 1998 Pages: 187 - 197