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Online Testable Approaches in Reversible Logic

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Abstract

We present an overview and analysis of existing work in the design of online testable reversible logic circuits, as well as propose new approaches for the design of such circuits. We explain how previously proposed approaches are unnecessarily high in overhead and in many cases do not provide adequate fault coverage. Proofs of the correctness of our approaches are provided, and discussions of the advantages and disadvantages of each design approach are given. Experimental results comparing our approaches to existing work are presented as well. Both approaches that we propose have better fault coverage and significantly lower overheads than previous approaches.

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  1. University of Lethbridge, 4401 University Dr. W., Lethbridge, AB, Canada

    N. M. Nayeem & J. E. Rice

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  1. N. M. Nayeem
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  2. J. E. Rice
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Correspondence to J. E. Rice.

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Responsible Editor: B. B. Bhattacharya

This research was funded by a grant from the Natural Sciences and Engineering Research Council of Canada (NSERC).

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Nayeem, N.M., Rice, J.E. Online Testable Approaches in Reversible Logic. J Electron Test 29, 763–778 (2013). https://doi.org/10.1007/s10836-013-5399-3

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