Abstract
Five figures of merit including number of gates, quantum cost, number of constant inputs, number of garbage outputs, and delay are used casually in the literature to compare the performance of different reversible or quantum logic circuits. In this paper we propose new definitions and enhancements, and identify similarities between these figures of merit. We evaluate these measures to show their strength and weakness. Instead of the number of gates, we introduce the weighted number of gates, where a weighting factor is assigned to each quantum or reversible gate, based on its type, size and technology. We compare the quantum cost with weighted number of gates of a circuit and show three major differences between these measures. It is proved that it is not possible to define a universal reversible logic gate without adding constant inputs. We prove that there is an optimum value for number of constant inputs to obtain a circuit with minimum quantum cost. Some reversible logic benchmarks have been synthesized using Toffoli and Fredkin gates to obtain their optimum values of number of constant inputs. We show that the garbage outputs can also be used to decrease the quantum cost of the circuit. A new definition of delay in quantum and reversible logic circuits is proposed for music line style representation. We also propose a procedure to calculate the delay of a circuit, based on the quantum cost and the depth of the circuit. The results of this research show that to achieve a fair comparison among designs, figures of merit should be considered more thoroughly.
Similar content being viewed by others
References
Barenco A., Bennett C.H., Cleve R., DiVincenzo D.P., Margolus N., Shor P., Sleator T., Smolin J.A., Weinfurter H.: Elementary gates for quantum computation. Phys. Rev. A 52(5), 3457–3467 (1995)
Banerjee, A., Pathak, A.: On the synthesis of sequential reversible circuit. arXiv:0707.4233v1 [quant-ph], 28 Jul 2007
Chuang, M.L., Wang, C.Y.: Reversible sequential element designs. In: 2007 IEEE Asia and South Pacific Design Automation Conference (ASPDAC’2007), Yokohama, Japan, pp. 420–425, January 2007
Fredkin E., Toffoli T.: Conservative logic. Int. J. Theo. Phys. 21, 219 (1982)
Grobe, D., Dueck, G.W., Chen, X., Drechsler R.: Exact SAT-based Toffoli network synthesis. In: ACM Great Lakes Symposium on VLSI 11–13 March 2007, Italy, pp. 96–101
Gupta, P., Agrawal, A., Jha, N.K.: An algorithm for synthesis of reversible logic circuits. In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, Number 11, pp. 2317–2330, November 2006
Haghparast M., Navi K.: A Novel reversible BCD adder for nanotechnology based systems. Am. J. Appl. Sci. 5(3), 282–288 (2008)
Kaye, P., Laflamme, R., Mosca, M.: An introduction to quantum computing. Oxford University Press. Jan 2007eBook-LinG, ISBN 0-19-857000-7
Kerntopf, P.: A new heuristic algorithm for reversible logic synthesis. In: Annual ACM IEEE Design Automation Conference Proceedings of the 41st annual conference on Design Automation, San Diego, CA, USA, pp. 834–837, 2004, ISBN:1-58113-828-8
Landauer, R.: Irreversibility and heat generation in the computing processes. In: IBM J. Res. Develop. July (1961)
Lee, S., Lee, S.J., Kim, T., Lee, J.-S., Biamonte, J., Perkowski, M.: The cost of quantum gate primitives. J. Multi-valued Logic Soft Comput. 12(5–6) (2006)
Lukac M., Perkowski M., Gol H.: Evolutionary approach to quantum and reversible circuits synthesis. Artif. Intell. Rev. 20(3–4), 361–417 (2003)
Maslov, D., Dueck, G.W.: Garbage in reversible design of multiple output functions. In: 6th International Symposium on Representations and Methodology of Future Computing Technologies, pp. 162–170, March 2003
Maslov, D.: Web Page: http://webhome.cs.uvic.ca/~dmaslov/
Miller, D.M., Dueck, G.W., Maslov, D.: A transformation based algorithm for reversible logic synthesis. In: Proceedings of the 40th Design Automation Conference, Anaheim, CA, pp. 318–323 (2003)
MohamadiM. Eshghi M.: Heuristic methods to use don’t cares in automated design of reversible and quantum logic circuits. Quantum Inf. Process. J. 7(4), 175–192 (2008)
Mohamadi, M., Eshghi, M., Navi, K.: Optimizing the reversible full adder circuit. In: IEEE EWDTS, Yerevan, pp. 312–315, 7–10 Sept. 2007
Mohamadi, M., Eshghi, M., Kaivani, A.: Design of reduced quantum cost reversible BCD adder. In: IEEE EWDTS, Yerevan, pp. 475–478, 7–10 Sept. 2007
Ollivier H., Tillich J.-P.: Quantum convolutional codes: fundamentals. arXiv:quant-ph/0401134v1, Jan. 2004
Peres A.: Reversible logic and quantum computers. Phys. Rev. A 32, 3266–3276 (1985)
Van Rentergem Y., De Vos V.: Optimal design of a reversible full adder. Int. J. Unconv. Comput. 1(4), 339–355 (2005)
Smolin J., DiVincenzo D.P.: Five two-qubit gates are sufficient to implement the quantum Fredkin gate. Phys. Rev. A 53(4), 2855–2856 (1996)
Stolze J., Suter D.: Quantum computing: a short course from theory to experiment. Wiley-VCH GmbH & Co, KGaA, Weinheim (2004)
Thapiyal, H.M., Srinivas, M.B.: A New reversible TSG gate and its applications for designing efficient adder circuit. In: 7th International Symposium (RM2005), Tokyo, Japan (2005)
Thapliyal, H.M., Kotiyal, S., Srinivas, M.B.: Novel BCD adders and their reversible logic implementation for IEEE 754r format. In: 19th International Conference on VLSI Design, Jan 2006
Thapliyal H.M., Arabnia H.R.: Reversible Programmable Logic Array (RPLA) using Fredkin & Feynman gates for industrial electronics and applications. CSREA Press, Las Vegas (2006) ESA’06
Toffoli, T.: Reversible computing. In: Tech memo MIT/LCS /TM–151, MIT Lab for Computer Science (1980)
Walus, K., Jullien, G.A., Dimitrov, V.S.: Computer arithmetic structures for quantum cellular automata. In: IEEE Conference on Signals, Systems and Computers, vol. 2, pp. 1435–1439, 9–12 Nov. 2003
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
Mohammadi, M., Eshghi, M. On figures of merit in reversible and quantum logic designs. Quantum Inf Process 8, 297–318 (2009). https://doi.org/10.1007/s11128-009-0106-0
Received:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s11128-009-0106-0
Keywords
- Quantum circuit
- Reversible logic
- Quantum cost
- Constant inputs
- Garbage outputs
- Weighted number of gates
- Delay