1 Introduction

In recent years, the notion of energy efficiency has permeated everyday life as well as science. For cognitive tasks, for instance, such an energy-efficient aspect can be realized via hardware implementations of neuronal networks. Then, a key ingredient is the neuronal model that inspires the hardware realization. Mathematical neuroscience has proposed a large number of different model classes that vary in terms of their level of complexity and implementation effort. To summarize only the most prominent ones, the Hodgkin–Huxley [1, 2] and the Morris–Lecar models [3,4,5,6] are strongly linked to biology in a close correspondence of dynamical variables and model parameters to physiological quantities. Furthermore, a simple, but well-established model is the integrate-and-fire model, which is still biologically inspired, but mathematically simplified. Several variations have been proposed, even recently [7,8,9,10]. Inbetween these two levels of mathematical approximation are the more abstract models such as the Izhikevich [11,12,13] and the Hindmarsh–Rose model [14,15,16]. In this work, we consider the Hindmarsh–Rose model because of its mathematical complexity that is significantly lower than the Hodgkin–Huxley model, but still exhibits a large amount of different neuronal dynamics, including bursting or spiking. Moreover, in contrast to, e.g., the Izhikevich model, which comes with a discontinuous reset, the Hindmarsh–Rose model is stated in terms of continuous differential equations, favoring a circuit implementation.

Existing circuit realizations of the Hindmarsh–Rose model are usually either based on field programmable gate arrays (FPGAs) [17] or integrator circuits [18, 19]. Here, one of the main challenges lies in realizing the cubic and quadratic nonlinearity of the Hindmarsh–Rose model, which has, for instance, been realized by multipliers [18, 20]. Multiplierless approaches have been recently proposed, e.g., in [21,22,23]. In contrast to this, an equivalent electrical circuit of the Hindmarsh–Rose model has been reported in [24] that only requires a negative impedance converter (NIC) as an active component. While this circuit is promising in terms of low-power consumption, it exhibits several highly nonlinear circuit elements that are difficult to realize without leading to high implementation costs. Our aim in this work is to simplify the equivalent circuit of [24] while still maintaining the generation of spiking and bursting behaviors, the major functionalities of the Hindmarsh–Rose model. For this purpose, we first analyze the power flows of the nonlinear circuit elements of the equivalent circuit to replace them by simpler, implementable passive circuit elements; cf. [25]. Second, we deploy memristor models based on devices with a filament-based bipolar switching [26] to approximate the cubic nonlinearity. Since the considered memristor models account for passive circuit elements, this results in a lower power consumption and, thus, an increased energy efficiency compared to operational-amplifier-based hardware realizations. Memristors are, in general, a very promising circuit element, especially in the context of neuromorphic engineering. This is especially because they can be used for synapse realizations [27, 28]. However, memristors are also used for neuron models. For instance, the differential equation for the slow current of the Hindmarsh–Rose model has been modified to account for memristors [16, 29, 30], while in [31,32,33], Hindmarsh–Rose models with an additional fourth memristor-based differential equation have been considered. In contrast to these approaches, in this work, we approximate the original Hindmarsh–Rose model with a memristor-based circuit.

The remainder of this work is structured as follows: In Sect. 2, we briefly summarize the original Hindmarsh–Rose model and the equivalent circuit presented in Ref. [24]. The latter serves as the basis for the circuit simplification discussed in Sect. 3. We verify the circuit’s ability to generate spiking and bursting behaviors by LTspice simulations in Sect. 4. We finish with some conclusions in Sect. 5.

2 Original Hindmarsh–Rose model

2.1 Hindmarsh–Rose model

The original Hindmarsh–Rose model is given by the following set of differential equations [14]:

$$\begin{aligned} \frac{\textrm{d}z_1}{\textrm{d}t}&= -\left[ az_1^2 + bz_1\right] z_1 + z_2 - z_3 + k \end{aligned}$$
(1a)
$$\begin{aligned} \frac{1}{dz_1} \frac{\textrm{d}z_2}{\textrm{d}t}&= -z_1 - \frac{1}{dz_1}z_2 + \frac{c}{dz_1} \end{aligned}$$
(1b)
$$\begin{aligned} \frac{1}{\epsilon s} \frac{\textrm{d}z_3}{\textrm{d}t}&= z_1 - \frac{1}{s}z_3 - \varphi \,, \end{aligned}$$
(1c)

where the dynamical variables \(z_1\), \(z_2\), and \(z_3\) denote the membrane potential, a fast current, and a slow current, respectively. \(a, b, c, d, \epsilon ,\) and s are positive constants, \(\varphi \) is the resting potential, and k represents the externally applied current. The parameter b together with k can be used to switch between bursting and spiking behavior; see [15, 16].

2.2 Equivalent electrical circuit

In [24], an equivalent electrical circuit for the Hindmarsh–Rose model has been proposed. We briefly recapitulate this circuit in this sequel, since it serves as the starting point for the desired model simplification. The equivalent circuit can be described by

$$\begin{aligned} C_1 \frac{\textrm{d}u_1}{\textrm{d}t}&= -G_{1}(u_1)u_1 + i_2 - i_3 + j_1 \end{aligned}$$
(2a)
$$\begin{aligned} \frac{L_2(u_1)}{f(u_1)} \frac{\textrm{d}i_2}{\textrm{d}t}&= -u_1 - \frac{R_2(u_1)}{f(u_1)}i_2 + e_2(u_1) \end{aligned}$$
(2b)
$$\begin{aligned} L_3 \frac{\textrm{d}i_3}{\textrm{d}t}&= u_1 - R_3i_3 + e_3 \end{aligned}$$
(2c)

with the circuit elements given by

$$\begin{aligned} G_1(u_1)&= \frac{au_1^2 - bU_0u_1}{R_0U_0^2}\,,\qquad C_1= \frac{L_0}{R_0^2}\,, \nonumber \\ R_2(u_1)&= \frac{R_0U_0}{d\left[ \varepsilon + |u_1|\right] } \,,\quad L_2(u_1)= \frac{L_0U_0}{d\left[ \varepsilon + |u_1|\right] }\,, \nonumber \\ R_3&= \frac{R_0}{s}\,,\qquad \qquad \qquad L_3= \frac{L_0}{\epsilon s}\,, \nonumber \\ j_1&= kI_0\,,\quad e_2(u_1)= \frac{cU_0^2}{du_1}\,, \quad e_3= -\phi U_0\,. \end{aligned}$$
(3)

Here, \(U_0=1\,\textrm{V}, I_0 = 1\,\textrm{mA}, R_0 = 1\,\mathrm {k\Omega }\), and \(L_0 = 1\,\mu \textrm{H}\) are normalization constants, \(f(u_1)\) is a smooth \(\textrm{signum}\)-function, which can be realized as a \(\textrm{tanh}\)-function, and \(\varepsilon = 10^{-3}\) ensures that the denominators of the inductance and resistance functions do not become zero. As proposed in [24], the smooth \(\textrm{signum}\)-function can be implemented using a voltage-controlled switch in combination with an NIC inverting the current, as illustrated in Fig. 1. Note that in contrast to [24], we have not split \(G_1(u_1)\) into its quadratic and linear term, because we approximate the combined terms as discussed in Sect. 3. The complete circuit then consists of a capacitor, inductor, resistor, current source, and voltage source, as well as a nonlinear inductor, a nonlinear resistor, a controlled voltage source, an NIC, and a switch. For more information on the equivalent circuit and its derivation, the interested reader is referred to [24].

Fig. 1
figure 1

Equivalent circuit of the Hindmarsh–Rose model

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3 Circuit simplification

Fig. 2
figure 2

Power flow of \(R_2(u_1)\) (top), change of stored energy of \(L_{2}(u_1)\) (top center), power of \(e_2(u_1)\) (bottom center), and total energy consumption (bottom) for a spiking (a) and a bursting behavior (b). Note that some of the plotted signals exceed the vertical axis limits. We have cut off those signals for the sake of clarity

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3.1 Power-flow analysis

The equivalent circuit of Fig. 1 consists of several nonlinear circuit elements, which are difficult to implement in practice. This is especially true for \(L_2(u_1)\) and \(R_2(u_1)\). In particular, from a circuit-theoretic point of view, both \(L_2(u_1)\) and \(R_2(u_1)\) are not well defined, since they are controlled by a voltage not present at their own respective port. As a result, this leads to high implementation costs in a hardware realization. For this reason, we aim for a simplification of the resistive and inductive part of the second differential equation [Eq. (1b)] while still maintaining a comparable spiking and bursting behavior. We additionally consider a simplification of \(e_2(u_1)\), because it is governed by a similar nonlinearity. Again, this simplification should preserve the major functionality of the Hindmarsh–Rose model, that is, the generation of comparable spiking and bursting dynamics. To this end, we investigate the respective power flows as well as the energy consumption of the complete circuit for a spiking and bursting behavior, as shown in Fig. 2a and b. The power flows and the energy consumption can be calculated via

$$\begin{aligned} p_{R_2}&=R_2i_2^2\,,\quad p_{e_2} =e_2\,i_2\,,\quad \dot{E}_{2} =u_2\,i_2\,, \end{aligned}$$
(4a)
$$\begin{aligned} E&=\int _{0}^{t_\textrm{end}} u_1\left[ u_1G_1 + i_1 + j_1\right] \nonumber \\&+ i_2\left[ i_2R_2 + u_2 + e_2\right] + i_3\left[ i_3R_3 + u_3 + e_3\right] \textrm{d}t \,. \end{aligned}$$
(4b)

The results have been obtained by solving Eq. (2) with a standard ODE solver in Matlab. The utilized parameters are given in Table 1.

Table 1 Hindmarsh–Rose parameters
Full size table

Let us first consider the total energy consumption of the circuit depicted in the bottom of Fig. 2. This shows that one spike during a spiking activity leads to an energy consumption of \(0.13\,\textrm{nJ}\). During one burst, \(0.12\,\textrm{nJ}\) energy is consumed, while in the quiescence phase between bursts, \(2.48\,\textrm{nJ}\) energy is consumed. Hence, while a burst and a spike during regular spiking consumes similar energy, most energy is consumed in the non-active state of the neuron circuit during a bursting behavior.

Concerning the power flows, several high power spikes and high spikes for the change of stored energy can be seen for \(R_2(u_1)\), \(e_2(u_1)\), and \(L_2(u_1)\). These spikes occur when \(u_1\) gets close to zero, since in this case, \(R_2(u_1)\), \(L_2(u_1)\), and \(e_2(u_1)\) become maximal. These power spikes are extremely narrow, because for the parameter set utilized in this work, \(u_1\) is only a transition point and not an equilibrium; see, e.g., [24]. Hence, the influence of these spikes on the overall power flow and thus on the functionality of the circuit is negligible. This in turn indicates that the nonlinearities of \(R_2(u_1)\), \(L_2(u_1)\), and \(e_2(u_1)\) themselves are negligible, cf. [25], since they are directly linked to the occurring power spikes. Hence, we choose \(L_2\), \(R_2\), and \(e_2\) constant by leaving out their dependency on \(u_1\). To sum up, the linear circuit elements now read

(5)

3.2 Memristive switch

The voltage-controlled switch together with the NIC used in the circuit of Fig. 1 implements the smooth \(\textrm{signum}\)-function \(f(u_1)\). Typically, the switch switches very fast between two positions. For a technical implementation, this could be problematic, as it can lead to peak currents and hence damage the inductor. For this purpose, we replace the switch by memristors that enable a slower switching process. Their design is based on the following main idea: Overall, the switch should allow for changing the polarity of the current \(i_2\) by alternating between two current paths. In particular, the path containing the NIC inverts the current \(i_2\), while the path with the short circuit passes on the non-inverted current. This switching between the two paths requires the currently active path to become highly conductive relative to the inactive path. As such, this behavior can be realized by two complementary switching memristors. In this work, we use memristor models inspired by filament-based memristors with a bipolar switching; see, e.g., [26]. Such memristors can be described by

$$\begin{aligned} i_\textrm{s}&= W_\textrm{s} u_{\textrm{s}\pm },\, W_{\textrm{s}}= W_{\textrm{s} 0} + z_{\textrm{s}}\left[ W_{\textrm{s} 1} - W_{\textrm{s} 0}\right] , \end{aligned}$$
(6a)
$$\begin{aligned} \frac{\textrm{d}z_{\textrm{s}}}{\textrm{d}t}&= \sigma \left( z_{\textrm{s}\nu }\right) \,\sigma \left( u_{\textrm{s}\pm }-U_\textrm{p,s}\right) \left[ u_{\textrm{s}\pm }-U_\textrm{p,s}\right] S_\textrm{p,s} \nonumber \\&\quad -\sigma \left( 1-z_{\textrm{s}\nu }\right) \,\sigma \left( -u_{\textrm{s}\pm }+U_\textrm{n,s}\right) \nonumber \\&\quad \left[ -u_{\textrm{s}\pm }+U_\textrm{n,s}\right] S_\textrm{n,s}\,, \end{aligned}$$
(6b)

where \(u_{\textrm{s}\pm } = u_\textrm{s}\) for \(W_\textrm{sa}\) and \(u_{\textrm{s}\pm } = -u_\textrm{s}\) for \(W_\textrm{sb}\). \(z_\textrm{s}\) is the state variable, \(W_{\textrm{s} 1}\) is the high conductance state, and \(W_{\textrm{s} 0}\) is the low conductance state. \(\sigma (\cdot )\) is the Heaviside function with

$$\begin{aligned} \sigma (z)&= {\left\{ \begin{array}{ll} 0, &{} z< 0\\ 1, &{} z\ge 0\,, \end{array}\right. } \end{aligned}$$

\(U_{\textrm{p,s}}\) and \(U_{\textrm{n,s}}\) are the positive and negative threshold voltages, respectively, and \(S_{\textrm{p,s}}\) and \(S_{\textrm{n,s}}\) are the slopes for an increasing and decreasing state variable, respectively.

Fig. 3
figure 3

Hindmarsh–Rose circuit with two memristors as switch

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We use two of these memristors to implement the desired switching behavior, as depicted in Fig. 3. In contrast to the switch proposed in [24], the memristive switch is not controlled by the voltage \(u_1\) but rather by its own voltage \(u_\textrm{s}\), as this leads to well-defined circuit elements. Moreover, the memristive switch adds an additional resistive term to the second differential equation [Eq. (2b)]. This can be seen when evaluating the mesh and node rules of Fig. 3. As a result, the new circuit is an approximation of the originally equivalent electrical circuit of the Hindmarsh–Rose model.

To keep this approximation as close as possible to the equivalent circuit, the choice of the memristor parameters is important. First, it should hold that \(\frac{1}{W_\textrm{s0}}<< R_2\). This way, the voltage drop at the memristive switch is small compared to the voltage present at the series interconnection of \(L_2\), \(R_2\), and \(e_2\), and thus alters the original circuit’s dynamics only marginally. Second, \(W_{\textrm{s} 1}\) should be significantly larger than \(W_{\textrm{s} 0}\), such that the memristive switch switches between the two current paths given by the NIC and the short circuit. Third, the threshold voltages \(U_{\textrm{p,s}}\) and \(U_{\textrm{n,s}}\) should be close to \(0\,\textrm{V}\), so that the switching occurs every time the voltage \(u_\textrm{s}\) changes its polarity. Finally, the slopes should enable a complete switching from the low to the high conductance state and vice versa for the time period by which the voltage \(u_\textrm{s}\) retains its polarity.

3.3 Memristive approximation of \(G_1(u_1)\)

The conductance \(G_1(u_1)\) stems from the cubic nonlinearity of the original Hindmarsh–Rose model in Eq. (1a). Together with the quadratic nonlinearity in Eq. 1b, an implementation of this nonlinearity for electrical circuits has been extensively dealt with in recent literature; see, e.g., [22, 23]. However, while some approaches have managed to mitigate the use of multipliers and have hence reduced the implementation cost, a larger amount of operational amplifiers and transistors is still necessary. For this reason, in this work, we take an alternative approach by approximating \(G_1(u_1)\) by memristors, such that the only active component required for the complete circuit is the NIC.

Inspired by [22], where the cubic nonlinearity has been fitted by three parametrized \(\textrm{tanh}\)-functions and an additional constant, we split \(G_1(u_1)\) into three parts that can be fitted by \(\left[ 1+\textrm{tanh}\right] \)-terms. In general, \(\textrm{tanh}\)-functions as well as \(\left[ 1+\textrm{tanh}\right] \)-terms can be realized in different ways, where one solution approach is the use of transistors [22, 34]. Moreover, a \(\left[ 1+\textrm{tanh}\right] \)-term is similar to an activation function for neuron models and neuronal networks, and can be realized, for instance, by memristors in combination with operational amplifiers [35]. However, since we aim for a purely memristive solution, we first consider the \(\left[ 1+\textrm{tanh}\right] \)-terms to be nonlinear conductances and replace them with memristor models later.

In contrast to pure \(\textrm{tanh}\)-terms, this results in non-negative conductance definitions that can be implemented by nonlinear resistors. The approximation for \(G_1(u_1)\) then yields

$$\begin{aligned} G_1(u_1)&\approx g_\textrm{n1}(u_1) - g_\textrm{n2}(u_1) + g_\textrm{n3}(u_1)\,, \nonumber \\ g_\textrm{n1}(u_1)&= G_\textrm{n1}\left[ 1 + \textrm{tanh}\left( \frac{-u_1 - U_\textrm{th,1}}{U_\textrm{sl,1}}\right) \right] \,, \nonumber \\ g_\textrm{n2}(u_1)&= G_\textrm{n2}\left[ 1 + \textrm{tanh}\left( \frac{u_1 - U_\textrm{th,2}}{U_\textrm{sl,2}}\right) \right] \,, \nonumber \\ g_\textrm{n3}(u_1)&= G_\textrm{n3}\left[ 1 + \textrm{tanh}\left( \frac{u_1 - U_\textrm{th,3}}{U_\textrm{sl,3}}\right) \right] \,, \end{aligned}$$
(7)

where \(G_\textrm{n1}\), \(G_\textrm{n2}\), and \(G_\textrm{n3}\) are the maximum conductance values, \(U_\textrm{th,1}\), \(U_\textrm{th,2}\), and \(U_\textrm{th,3}\) are the threshold voltages, and \(U_\textrm{n,1}\), \(U_\textrm{n,2}\), and \(U_\textrm{n,3}\) determine the slopes of the \(\tanh \)-functions. Note that every term \(g_\mathrm {n\mu }, \mu =1,2,3\), represents a single conductance, such that, in total, three nonlinear conductances are required to implement \(G_1(u_1)\). This leads to one conductance switching between \(0\,\textrm{S}\) and \(-G_\textrm{n2}\), indicating an active component. However, since we already exploit an NIC, which can also enable negative conductances, we can implement the desired conductance without requiring an additional active component by placing a non-negative conductance at the port of the NIC.

Table 2 Results for the fitting of \(G_1(u_1)\)
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Fig. 4
figure 4

Fitting \(G_1(u_1)\) by three nonlinear conductances based on \(\left[ 1+\textrm{tanh}\right] \)-terms, with \(u_\textrm{min}=-1.5\,\textrm{V}\), \(u_\textrm{max}=2\,\textrm{V}\), \(G_\textrm{min}=-1.4\,\textrm{mS}\), and \(G_\textrm{max}=0.6\,\textrm{mS}\). (a) Comparison between \(G_1(u_1)\) and the complete fitting result and (b) comparison of \(G_1(u_1)\) and the individual nonlinear conductances \(g_\textrm{n1}(u_1), g_\textrm{n2}(u_1)\), and \(g_\textrm{n3}(u_1)\)

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The results of this fitting procedure are illustrated in Fig. 4 and the corresponding parameters are shown in Table 2.

Figure 4b shows the three parts of \(G_1(u_1)\) being fitted by \(g_\textrm{n1}(u_1)\), \(g_\textrm{n2}(u_1)\), and \(g_\textrm{n3}(u_1)\), highlighted by the shaded areas. These parts cover the operation range of the Hindmarsh–Rose model for the parameters given in Table 1. As can be seen from Fig. 4a, the combined nonlinear conductances fit \(G_1(u_1)\) well within the operation range. A small deviation can be seen at \(0\,\textrm{V}\), which is caused by both \(g_\textrm{n1}(u_1)\) and \(g_\textrm{n2}(u_1)\) entering regions where they become nearly constant; see Fig. 4b.

Fig. 5
figure 5

Equivalent circuit of the simplified Hindmarsh–Rose model with three additional memristors \(W_{\textrm{n}\mu }\), \(\mu =1, 2, 3\), replacing the conductance \(G_1(u_1)\)

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The overall behavior of the nonlinear conductances \(g_\textrm{n1}(u_1), g_\textrm{n2}(u_1)\), and \(g_\textrm{n3}(u_1)\) is to switch between \(0\,\textrm{S}\) and their maximum conductance values. This switching behavior can be approximated by filament-based memristors with a bipolar switching, although deviations between the memristive solution and the nonlinear conductances are to be expected due to the threshold-based switching of the memristors. Similar to the memristive switch, the utilized memristor models yield

$$\begin{aligned} i_{\textrm{n}\mu }&= W_{\textrm{n}\mu } u_{1\pm }\,,\qquad \mu \in [1,2,3]\,, \nonumber \\ W_{\textrm{n}\mu }&= W_{\textrm{n}\mu 0} + z_{\textrm{n}\mu }\left[ W_{\textrm{n}\mu 1} - W_{\textrm{n}\mu 0}\right] \,, \end{aligned}$$
(8a)
$$\begin{aligned} \frac{\textrm{d}z_{\textrm{n}\mu }}{\textrm{d}t}&= \sigma (z_{\textrm{n}\mu })\,\sigma (u_{1\pm }-U_{\textrm{p},\textrm{n}\mu })\nonumber \\&\left[ u_{1\pm }-U_{\textrm{p},\textrm{n}\mu }\right] S_{\textrm{p},\textrm{n}\mu }-\sigma (1-z_{\textrm{n}\mu }) \nonumber \\&\sigma (-u_{1\pm }+U_{\textrm{n},\textrm{n}\mu })\left[ -u_{1\pm }+U_{\textrm{n},\textrm{n}\mu }\right] S_{\textrm{n},\textrm{n}\mu }\,. \end{aligned}$$
(8b)

Here, \(u_{1\pm } = u_1\) for \(W_\textrm{n2}\) and \(W_\textrm{n3}\) and \(u_{1\pm } = -u_1\) for \(W_\textrm{n1}\). \(z_\mathrm {n\mu }\) is the state variable, \(W_{\textrm{n} \mu 1}\) is the high conductance state, and \(W_{\textrm{n}\mu 0}\) is the low conductance state. \(U_{\textrm{p,n},\mu }\) is the positive threshold voltage, \(U_{\mathrm {n,\textrm{n}\mu }}\) is the negative threshold voltage, and \(S_{\textrm{p,n}\mu }\) and \(S_{\textrm{n,n}\mu }\) are the slopes for an increasing and decreasing state variable, respectively.

\(G_1(u_1)\) depends on the bifurcation parameter b and is an important factor for the dynamic behavior of the original Hindmarsh–Rose model. The choice of the memristive parameters approximating this conductance thus strongly influences the exhibited dynamic behavior of the simplified circuit. In general, the low conductance states \(W_{\textrm{n} \mu 0}\) are freely selectable as long as \(W_{\textrm{n} \mu 0} \ll 1\,\textrm{mS}\) is satisfied. The high conductance states should be chosen similar to \(G_\textrm{n1}\), \(G_\textrm{n2}\), and \(G_\textrm{n3}\) from Eq. (7). All negative threshold voltages \(U_{\textrm{n,n}\mu }\) should be close to \(0\,\textrm{V}\). This is the closest approximation of \(g_\textrm{n1}(u_1)\), \(g_\textrm{n2}(u_1)\), and \(g_\textrm{n3}(u_1)\) from Fig. 4, which start switching even before the voltage \(u_1\) becomes negative. Concerning the positive threshold voltages, \(U_{\textrm{p,n}\mu 1}\) should also be close to \(0\,\textrm{V}\), as this is again the closest approximation of \(G_\textrm{n1}(u_1)\) from Fig. 4. \(U_{\textrm{p,n}\mu 2}\) and \(U_{\textrm{p,n}\mu 3}\) should be chosen similar to \(U_\textrm{th,2}\) and \(U_\textrm{th,3}\) from Eq. (7), respectively. Finally, the slopes \(S_{\textrm{p}\mu }\) and \(S_{\textrm{n}\mu }\) should enable a complete switching from the low to the high conductance state and vice versa for the time period by which the voltage \(u_1\) does not change its polarity.

Replacing the nonlinear conductance \(G_1(u_1)\) by the three memristors \(W_{\textrm{n}1}, W_{\textrm{n}2}\), and \(W_{\textrm{n}3}\) as depicted in Fig. 5, the simplified Hindmarsh–Rose circuit is now governed by

$$\begin{aligned} C_1 \frac{\textrm{d}u_1}{\textrm{d}t}&= -\left[ W_\textrm{n1} + W_\textrm{n2} + W_\textrm{n3}\right] u_1\nonumber \\&\quad + \frac{W_\textrm{sa} - W_\textrm{sb}}{W_\textrm{sa} + W_\textrm{sb}} i_2- i_3 + j_1 \end{aligned}$$
(9a)
$$\begin{aligned} L_2 \frac{\textrm{d}i_2}{\textrm{d}t}&= -u_1 - R_2i_2 - \frac{1}{W_\textrm{sa} + W_\textrm{sb}}i_2 + e_2 \end{aligned}$$
(9b)
$$\begin{aligned} L_3 \frac{\textrm{d}i_3}{\textrm{d}t}&= u_1 - R_3i_3 + e_3 \end{aligned}$$
(9c)
$$\begin{aligned} \frac{\textrm{d}z_{\textrm{s}\nu }}{\textrm{d}t}&=\sigma (z_{\textrm{s}\nu })\,\sigma (u_{\textrm{s}\pm }-U_\textrm{p,s}) \nonumber \\&\left[ u_{\textrm{s}\pm }-U_\textrm{p,s}\right] S_\textrm{p,s}-\sigma (1-z_{\textrm{s}\nu })\,\nonumber \\&\sigma (-u_{\textrm{s}\pm }+U_\textrm{n,s})\left[ -u_{\textrm{s}\pm }+U_\textrm{n,s}\right] S_\textrm{n,s}\end{aligned}$$
(9d)
$$\begin{aligned} \frac{\textrm{d}z_{\textrm{n}\mu }}{\textrm{d}t}&= \sigma (z_{\textrm{n}\mu })\,\sigma (u_{1\pm }-U_{\textrm{p},\textrm{n}\mu }) \nonumber \\&\left[ u_{1\pm }-U_{\textrm{p},\textrm{n}\mu }\right] S_{\textrm{p},\textrm{n}\mu }-\sigma (1-z_{\textrm{n}\mu }) \nonumber \\&\sigma (-u_{1\pm }+U_{\textrm{n},\textrm{n}\mu })\left[ -u_{1\pm }+U_{\textrm{n},\textrm{n}\mu }\right] S_{\textrm{n},\textrm{n}\mu }\,, \end{aligned}$$
(9e)

with \(\nu \in [a,b]\) and \(\mu \in [1,2,3]\).

4 Simulation results

In this section, we discuss numerical results based on LTspice simulations of the circuit shown in Fig. 5 to verify the simplified circuit’s ability to generate a bursting and spiking behavior. For this purpose, we implement the NIC by a controlled voltage and current source, as illustrated in Fig. 6. For a practical circuit implementation, the NIC can, for instance, be realized by operational amplifiers [36, 37] or current conveyors [38]; cf. [24]. Memristors are modeled by implementing each equation by a controlled voltage source.

We also simulate the model from Sect. 3.1 (cf. Fig. 3) with an ODE solver in Matlab to investigate the intermediate modeling steps. To compare the results to the equivalent circuit of the original Hindmarsh–Rose model, we further simulate Eq. (2). The parameters used for the memristors of the simplified circuit are given in Table 3.

Fig. 6
figure 6

Negative impedance converter (a) and its implementation by a controlled voltage and current source

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Table 3 Memristor parameters for the simplified Hindmarsh–Rose model
Full size table

Simulation results are shown in Fig. 7, which depicts the time series of \(u_1\) next to the corresponding trajectory in the three-dimensional phase space.

Before exploring the bursting regime, we first consider the spiking behavior. In Fig. 7a, the original model generates eight spikes and exhibits a spike-frequency adaption. In contrast to this, the models from Sects. 3.1 and 3.2 generate four and six spikes, respectively, but show a long-lasting first spike instead of a spike-frequency adaption. The model from Sect. 3.3, however, again shows a spike-frequency adaption while generating seven spikes. It should also be noted that the input current has been drastically increased for all modified models from \(j_1 = 2.5\,\textrm{mA}\) to \(j_1 = 9\,\textrm{mA}\). This shows that the neglected nonlinearity of the original circuit elements and the associated power spikes are compensated by a larger input current. Additionally, it can be seen that the spike shape changes for the models of Sects. 3.2 and 3.3. In particular, the spikes now exhibit a distinct hyperpolarization phase, which can be interpreted as a behavior close to biology.

Observing the phase-space trajectories in Fig. 7b, two groups can be seen. The first group contains the original model and the model from Sect. 3.1, which show a similar limit cycle, but differ in terms of their transient approach to the limit cycle. The second group contains the model from Sects. 3.2 and 3.3 and show a similar, yet differently shaped limit cycle. Overall, there are two different limit cycles for the four models, with one model per limit cycle showing a spike-frequency adaption in the transient phase.

Fig. 7
figure 7

The membrane potentials (a, c) and the state trajectories (b, d) for a spiking (left) and bursting behavior (right). Depicted are the results of the original Hindmarsh–Rose model (top row), the model from Sect. 3.1 (second row from the top), the model from Sect. 3.2 (second row from the bottom), and the model from Sect. 3.3 (bottom row). The utilized parameters for the spiking are \(k_\textrm{S} = 9\), \(k_\textrm{S} = 9\), and \(k_\textrm{S} = 7.5\) for the results of Sect. 3.1, Sect. 3.2, and Sect. 3.3, respectively. Concerning the bursting behavior, \(k_\textrm{B}\) is chosen to \(k_\textrm{B} = 9\), \(k_\textrm{B} = 7.5\), and \(k_\textrm{B} = 7\) for the results of Sect. 3.1, Sect. 3.2, and Sect. 3.3, respectively

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The bursting behavior is depicted in Fig. 7c. While each models generates bursts consisting of three spikes, the original model exhibits two bursts, the model from Sect. 3.1 shows five bursts, and the models from Sects. 3.2 and 3.3 show three bursts. It is likely that the linearized circuit elements cause the increase of the burst frequency, as this increase can already be observed from the model of Sect. 3.1. This is also supported by the fact that the input current is again raised once the linearized circuit elements are introduced. Similar to the the spiking behavior, it can be observed that the models from Sects. 3.2 and 3.3 exhibit a clearly visible depolarization phase. Additionally, another intraburst spike starts at the end of a burst, but is strongly damped when the quiescence phase begins. As this first appears for the model of Sect. 3.2, this is probably caused by the introduction of the memristive switch.

Considering the spike trajectories of Fig. 7d, one can see that the limit cycles of the original model and the model from Sect. 3.1 are distantly similar. On the other hand, the limit cycles of the models from Sects. 3.2 and 3.3 are extremely similar. For this reason, the grouping of the models mentioned for the spiking behavior applies for the bursting behavior, as well.

5 Conclusion

In this work, we have analyzed the power flows of an equivalent circuit of the Hindmarsh–Rose model. Based on this analysis, we have simplified the equivalent circuit by replacing a nonlinear inductance, resistance, and voltage source by constant circuit elements. In addition, we have replaced the switch proposed for the equivalent circuit by two memristors. These memristors enable a smooth, continuous switching between two competing current paths, preventing high current peaks occurring during the switching process. Moreover, we have approximated the cubic nonlinearity of the original Hindmarsh–Rose model by three memristors, acting as passive circuit elements. In total, our simplified Hindmarsh–Rose circuit only requires one active component given by a negative impedance converter. In contrast to other approaches reported in the literature, this significantly reduces the amount of required transistors and operational amplifiers.

We have verified our circuit’s ability to generate spiking and bursting dynamics by LTspice simulations. While the amount of spikes and bursts have changed, the qualitative behavior is maintained by the simplified circuit.

Considering a practical circuit implementation, there are several challenges that need to be addressed in future research. For example, a sensitivity analysis of the circuit parameters with respect to the desired neuronal dynamics, as well as implementation with more advanced software tools such as PSPICE can aid the design process. Even more importantly, as discussed in, for instance, [39], memristors suffer from large manufacturing variability and might even undergo irreversible changes. Hence, more reliable, available memristors are required. How reliable the parameters of these memristors should be can be investigated in advance, for example, by bifurcation analyses with respect to the memristor parameters used for the approximated cubic nonlinearity.