Skip to main content
SpringerLink
Log in

MOSFETs-only sub-1-V voltage references for ultra-low-power applications

  • Published:
Analog Integrated Circuits and Signal Processing Aims and scope Submit manuscript

Abstract

Two sub-1-V MOSFETs only voltage reference designs, working in subthreshold region are proposed. They consume ultra-low power, exhibit high temperature and supply voltage independence, operate at sub-1-V supply and are suitable for fabrication using N-well CMOS technology. A voltage reference circuit (circuit-1) with dual-threshold voltage MOSFETs, which can provide a nominal output voltage of 554 mV exhibiting high temperature-compensation is proposed. Simulation results show that it has a temperature coeffcient of \(13\,\hbox {ppm}/^{\circ }\hbox {C}\) and a power consumption of 2.1 nW. Another reference circuit (circuit-2) using only single threshold voltage MOSFETs with a high nominal output of 773 mV is also proposed. Simulation results show that it has a line sensitivity of 0.073%/V and a power consumption of 2.4 nW. Statistical analysis based on Monte-Carlo simulation show that the performance of both the circuits will not be significantly affected by process variations.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14
Fig. 15
Fig. 16
Fig. 17
Fig. 18

Similar content being viewed by others

References

  1. Widlar, R. J. (1971). New developments in IC voltage regulators. IEEE Journal of Solid-State Circuits, 6(1), 2–7.

    Article  Google Scholar 

  2. Brokaw, A. P. (1974). A simple three-terminal IC bandgap reference. IEEE Journal of Solid-State Circuits, 9(6), 388–393.

    Article  Google Scholar 

  3. Neuteboom, H., Kup, B. M. J., & Janssens, M. (1997). A DSP based hearing instrument IC. IEEE Journal of Solid-State Circuits, 32(11), 1790–1806.

    Article  Google Scholar 

  4. Banba, H., Shiga, H., Umezawa, A., Miyaba, T., Tanzawa, T., Atsumi, S., et al. (1999). A CMOS bandgap reference circuit with sub- 1-V operation. IEEE Journal of Solid-State Circuits, 3(5), 670–674.

    Article  Google Scholar 

  5. Zhou, Z., Zhu, P., Shi, Y., Wang, H., Ma, Y., Xu, X., et al. (2003). A CMOS voltage reference based on mutual compensation of Vtn and Vtp. IEEE Journal of Solid-State Circuits, 38(1), 146–150.

    Article  Google Scholar 

  6. Lo, T. Y., Hung, C. C., & Ismail, M. (2010). CMOS voltage reference based on threshold voltage and thermal voltage. Analog Integrated Circuits and Signal Processing, 62, 9–15.

    Article  Google Scholar 

  7. Wu, J., Chen, C., Shen, H., Huang, C., & Liu, H. (2013). A high PSRR CMOS voltage reference with 1.2 V operation. Analog Integrated Circuits and Signal Processing, 77, 79–86.

    Article  Google Scholar 

  8. Vita, G. D., & Iannaccone, G. (2007). A sub-1-V, 10 \({ppm/^\circ C}\), nanopower voltage reference generator. IEEE Journal of Solid-State Circuits, 42(7), 1536–1542.

    Article  Google Scholar 

  9. Guo, W., Li, Y., Li, S., Huang, Z., Wang, B., Mo, B., & Chen, D. (2018). A 70-nA 13-\({ppm/^\circ C}\), all-MOSFET voltage reference for low-power IoT systems. In Proceeding of IEEE international symposium on circuits and systems.

  10. Alhassan, N., Zhou, Z., & Sinencio, E. S. (2017). An all- MOSFET sub-1-V voltage reference with a \(-\,51\)-dB PSR up to 60 MHz. IEEE Transactions on VLSI systems, 25(3), 919–928.

    Article  Google Scholar 

  11. Ueno, K., Hirose, T., Asai, T., & Amemiya, Y. (2009). A 300 nW, 15 \({ppm/^{\circ } C}\), 20 ppm/V CMOS voltage reference circuit consisting of subthreshold MOSFETs. IEEE Journal of Solid-State Circuits, 44(7), 2047–054.

    Article  Google Scholar 

  12. Zeng, Y., Zhang, X., & Tan, H. (2017). A 86 nA and sub-1V CMOS voltage reference without resistors and special devices. In Proceedings of IFIP/IEEE international conference on VLSI-SoC (pp. 1–5).

  13. Nejad, T. G., Farshidi, E., Sjo, H., & Kosarian, A. (2019). A high precision logarithmic-curvature compensated all CMOS voltage reference. Analog Integrated Circuits and Signal Processing, 99, 383–392.

    Article  Google Scholar 

  14. Magnelli, L., Crupi, F., & Corsonel, P. (2011). A 2.6 nW, 0.45 V temperature-compensated subthreshold CMOS voltage reference. IEEE Journal of Solid-State Circuits, 42(7), 465–474.

    Article  Google Scholar 

  15. Liu, Y., Zhan, C., & Wang, L. (2018). An ultralow power subthreshold CMOS voltage reference without requiring resistors or BJTs. IEEE Transactions on Very VLSI Systems, 26(1), 201–205.

    Article  Google Scholar 

  16. Liu, Y., Zhan, C., Wang, L., Tang, J., & Wang, G. (2017). A 0.4-V wide temperature range all-MOSFET subthreshold voltage reference with 0.027%/V line sensitivity. IEEE Transactions on Circuits and Systems II: Express Briefs, 65(8), 969–973.

    Article  Google Scholar 

  17. Zhou, Z., Cao, J., Wang, Y., Shi, Y., Wang, Z., & Zhang, B. (2019). A Nanoscale low-power resistorless voltage reference with high PSRR. Nanoscale Research Letters, 14, 33–33.

    Article  Google Scholar 

  18. Dastgerdi, M. A., Habibi, M., & Dolatshahi, M. (2019). A novel two stage cross coupled architecture for low voltage lowpower voltage reference generator. Analog Integrated Circuits and Signal Processing, 99, 393–402.

    Article  Google Scholar 

  19. Seok, M., Kim, G., Blaauw, D., & Sylvester, D. (2012). A portable 2-transistor picowatt temperature- compensated voltage reference operating at 0.5 V. IEEE Journal of Solid-State Circuits, 10(7), 2534–2544.

    Article  Google Scholar 

  20. Lee, I., Sylvester, D., & Blaauw, D. (2017). A subthreshold voltage reference with scalable output voltage for low power IoT systems. IEEE Journal of Solid-State Circuits, 52(5), 1443–1449.

    Article  Google Scholar 

  21. Kok, C., & Tam, W. (2013). CMOS voltage references an analytical and practical perspective. Singapore: Wiley.

    Google Scholar 

  22. Pal, A. (2015). Low-power VLSI circuits and systems. New Delhi: Springer.

    Book  Google Scholar 

  23. Razavi, B. (2001). Design of analog CMOS integrated circuit. New York: McGraw-Hill.

    Google Scholar 

Download references

Acknowledgements

The authors would like to thank the Special Manpower Development Program for Chips to System Design (SMDP-C2SD) of Goverment of India for the VLSI-CAD tool facilities.

Author information

Authors and Affiliations

  1. NIT Calicut, Kozhikode, India

    Archana Prasannakumar, Nithin Thomas Abraham & Dhanaraj Kakkanattu Jagalchandran

Authors
  1. Archana Prasannakumar
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Nithin Thomas Abraham
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Dhanaraj Kakkanattu Jagalchandran
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Nithin Thomas Abraham.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Prasannakumar, A., Abraham, N.T. & Dhanaraj, K. MOSFETs-only sub-1-V voltage references for ultra-low-power applications. Analog Integr Circ Sig Process 103, 355–365 (2020). https://doi.org/10.1007/s10470-020-01619-8

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10470-020-01619-8

Keywords

Search

Navigation