Abstract
A high energy-efficiency tri-level switching scheme for successive approximation register converters (SAR ADCs) is presented. The most significant bit-splitting digital to analogue converter and the least significant bit-down technique are combined in this work. The proposed scheme achieves 99.76% saving in switching energy and 75% area reduction compared with the traditional scheme. Besides large switching energy saving, the common mode voltage keeps constant except the LSB conversion, which reduces the dynamic offset of the comparator.
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References
Ginsburg, B. P., & Chandrakasan, A. P. (2005). An energy-efficient charge recycling approach for a SAR converter with capacitive DAC. In 2005 IEEE international symposium on circuits and systems, (pp. 184–187).
Zhu, Y., Chan, C. H., Chio, U. F., Sin, S. W., U, S. P., Martins, R. P., et al. (2010). A 10-bit 100-MS/s reference-free SAR ADC in 90 nm CMOS. IEEE Journal of Solid-State Circuits, 45(6), 1111–1121.
Liu, C. C., Chang, S. J., Huang, G. Y., & Lin, Y. Z. (2010). A 10-bit 50-MS/s SAR ADC with a monotonic capacitor switching procedure. IEEE Journal of Solid-State Circuits, 45(4), 731–740.
Rahimi, E., & Yavari, M. (2014). Energy-efficient high-accuracy switching method for SAR ADCs. Electronics Letters, 50(7), 499–501.
Yuan, C., & Lam, Y. (2012). Low-energy and area-efficient tri-level switching scheme for SAR ADC. Electronics Letters, 48(9), 482–483.
Baek, S. U., Lee, K. Y., & Lee, M. (2018). Energy-efficient switching scheme for SAR ADC using zero-energy dual capacitor switching. Analog Integrated Circuits and Signal Processing, 94(2), 317–322.
Tong, X., & Zhang, Y. (2015). 98.8% switching energy reduction in SAR ADC for bioelectronics application. Electronics Letters, 51(14), 1052–1054.
Zhang, H., Zhang, H., & Zhang, R. (2017). Energy-efficient higher-side-reset-and-set switching scheme for SAR ADC. Electronics Letters, 53(18), 1238–1240.
Zhang, J., & Zhu, Z. M. (2018). High energy-efficient partial floating capacitor array DAC scheme for SAR ADCs. Analog Integrated Circuits and Signal Processing, 94(1), 171–175.
Hariprasath, V., Guerber, J., Lee, S. H., & Moon, U. K. (2010). Merged capacitor switching based SAR ADC with highest switching energy-efficiency. Electronics Letters, 46(9), 620–621.
Wang, H., Zhong, L. G., & Zheng, S. F. (2017). Ultra-low-power capacitor-splitting switching algorithm with minus energy for SAR ADCs. Analog Integrated Circuits and Signal Processing, 91(3), 491–495.
Ding, Z., Bai, W. B., & Zhu, Z. M. (2016). Trade-off between energy and linearity switching scheme for SAR ADC. Analog Integrated Circuits and Signal Processing, 86(1), 121–125.
Acknowledgements
This work was supported by the Fundamental Research Funds for the Central Universities under the Project Number of 2242018K30006.
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Wang, F., Wu, J. A low energy switching scheme for SAR ADC with MSB-splitting DAC structure. Analog Integr Circ Sig Process 100, 199–203 (2019). https://doi.org/10.1007/s10470-019-01449-3
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DOI: https://doi.org/10.1007/s10470-019-01449-3