Special-purpose digital hardware for neural networks: An architectural survey Paolo IenneThierry CornuGary Kuhn OriginalPaper 01 August 1996 Pages: 5 - 25
Dynamic programming implementation on array processor architectures K. I. DiamantarasW. H. ChouS. Y. Kung OriginalPaper 01 August 1996 Pages: 27 - 35
Hardware/Software co-design with the HMS framework Michael SheligaEdwin Hsing-Mean Sha OriginalPaper 01 August 1996 Pages: 37 - 56
FFT computation with linear processor arrays using a data-driven control scheme Ding-Ming KwaiBehrooz Parhami OriginalPaper 01 August 1996 Pages: 57 - 66
An optimal time multiplication free algorithm for edge detection on a mesh Manjit BorahChetana NagendraMary Jane Irwin OriginalPaper 01 August 1996 Pages: 67 - 75