1. Editorial

   • Vishwani D. Agrawal

   EditorialNotes Pages: 5 - 5

2. Guest editorial

   • Srinivas Devadas
   • Petra Michel

   EditorialNotes Pages: 7 - 7

3. New editorial board members

   EditorialNotes Pages: 9 - 9

4. Journal of electronic testing: Theory and applications

   Legacy Pages: 10 - 10

5. An approach to sequential circuit diagnosis based on formal verification techniques

   • G. Cabodi
   • P. Camurati
   • M. Sonza Reorda

   OriginalPaper Pages: 11 - 17

6. Synchronizing sequences and symbolic traversal techniques in test generation

   • Hyunwoo Cho
   • Seh-Woong Jeong
   • Carl Pixley

   OriginalPaper Pages: 19 - 31

7. Functional versus random test generation for sequential circuits

   • Margot Karam
   • Gabriele Saucier

   OriginalPaper Pages: 33 - 41

8. Testability analysis in high level data path synthesis

   • Johannes Steensma
   • Werner Geurts
   • Hugo De Man

   OriginalPaper Pages: 43 - 56

9. Finite state machine synthesis with fault tolerant test function

   • Srimat T. Chakradhar
   • Suman Kanjilal
   • Vishwani D. Agrawal

   OriginalPaper Pages: 57 - 69

10. Generating a family of testable designs using the BILBO methodology

    • Sen-Pin Lin
    • Charles A. Njinda
    • Melvin A. Breuer

    OriginalPaper Pages: 71 - 89

11. A synthesis-based test generation and compaction algorithm for multifaults

    • Srinivas Devadas
    • Kurt Keutzer
    • Sharad Malik

    OriginalPaper Pages: 91 - 104

12. Enhancing on-line testability during synthesis

    • Bernhard Eschermann

    OriginalPaper Pages: 105 - 116

13. Call for papers

    Announcement Pages: 117 - 117