Volume 35, Issue 5

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October 2019

Special Issue on International Conference on VLSI Design and Embedded Systems

Issue Editors:

Kanad Basu,
Mingsong Chen,
Rubin Parekhji

15 articles in this issue

Editorial
Vishwani D. Agrawal
EditorialNotes 17 October 2019 Pages: 573 - 573
2018 JETTA-TTTC Best Paper Award

Announcement 31 October 2019 Pages: 575 - 576
Test Technology Newsletter

News 05 September 2019 Pages: 577 - 578
Guest Editorial
Kanad Basu
Mingsong Chen
Rubin Parekhji
EditorialNotes 15 November 2019 Pages: 579 - 580
Novel Randomized Placement for FPGA Based Robust ROPUF with Improved Uniqueness
Arjun Singh Chauhan
Vineet Sahula
Atanendu Sekhar Mandal
OriginalPaper 20 November 2019 Pages: 581 - 601
Correction to: Novel Randomized Placement for FPGA Based Robust ROPUF with Improved Uniqueness
Arjun Singh Chauhan
Vineet Sahula
Atanendu Sekhar Mandal
Correction 19 December 2019 Pages: 603 - 604
Count Your Toggles: a New Leakage Model for Pre-Silicon Power Analysis of Crypto Designs
Rajat Sadhukhan
Paulson Mathew
Debdeep Mukhopadhyay
OriginalPaper 06 November 2019 Pages: 605 - 619
A State Machine Encoding Methodology Against Power Analysis Attacks
Richa Agrawal
Ranga Vemuri
Mike Borowczak
OriginalPaper 09 September 2019 Pages: 621 - 639
Classical Cryptanalysis Attacks on Logic Locking Techniques
Bodhisatwa Mazumdar
Soma Saha
Tatavarthy Venkat Nikhil
OriginalPaper 15 November 2019 Pages: 641 - 654
SAT-based Silicon Debug of Electrical Errors under Restricted Observability Enhancement
Binod Kumar
Masahiro Fujita
Virendra Singh
OriginalPaper 19 November 2019 Pages: 655 - 678
Equivalence Checking and Compaction of n-input Majority Terms Using Implicants of Majority
Rajeswari Devadoss
Kolin Paul
M. Balakrishnan
OriginalPaper 30 November 2019 Pages: 679 - 694
RSBST: an Accelerated Automated Software-Based Self-Test Synthesis for Processor Testing
Vasudevan Madampu Suryasarman
Santosh Biswas
Aryabartta Sahu
OriginalPaper 09 October 2019 Pages: 695 - 714
A Binary Decision Diagram Approach to On-line Testing of Asynchronous Circuits with Dynamic and Static C-elements
Pradeep Kumar Biswal
Santosh Biswas
OriginalPaper 07 November 2019 Pages: 715 - 727
An Integrated Framework for Application Independent Testing of FPGA Interconnect
Shukla Banik
Suchismita Roy
Bibhash Sen
OriginalPaper 18 October 2019 Pages: 729 - 740
Identification of Random/Clustered TSV Defects in 3D IC During Pre-Bond Testing
Dilip Kumar Maity
Surajit Kumar Roy
Chandan Giri
OriginalPaper 11 November 2019 Pages: 741 - 759

Volume 35, Issue 5

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