1. Editorial

   • Vishwani D. Agrawal

   EditorialNotes 26 September 2007 Pages: 369 - 369

2. Test Technology Newsletter - October 2007

   • Bruce Kim

   News 29 September 2007 Pages: 371 - 372

3. Too Few or Too Many Properties? Measure it by ATPG!

   • Franco Fummi
   • Graziano Pravadelli

   OriginalPaper 21 September 2007 Pages: 373 - 388

   

4. A System-layer Infrastructure for SoC Diagnosis

   • P. Bernardi
   • M. Grosso
   • M. Sonza Reorda

   OriginalPaper 13 September 2007 Pages: 389 - 404

   

5. Dynamic Fault Diagnosis of Combinational and Sequential Circuits on Reconfigurable Hardware

   • Fatih Kocan
   • Daniel G. Saab

   OriginalPaper 13 September 2007 Pages: 405 - 420

   

6. A Novel EDA Tool for VLSI Test Vectors Management

   • Walid Ibrahim

   OriginalPaper 21 September 2007 Pages: 421 - 434

7. Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits

   • Luigi Dilillo
   • Patrick Girard
   • Magali Bastian

   OriginalPaper 11 September 2007 Pages: 435 - 444

   

8. Functional Constraints vs. Test Compression in Scan-Based Delay Testing

   • Ilia Polian
   • Hideo Fujiwara

   OriginalPaper 09 September 2007 Pages: 445 - 455

   

9. Securing Scan Control in Crypto Chips

   • David Hély
   • Frédéric Bancel
   • Bruno Rouzeyre

   OriginalPaper 12 September 2007 Pages: 457 - 464