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Ternary Logic Gates Using Quantum Dot Gate FETs (QDGFETs)

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Abstract

Quantum dot gate FETs (QDGFET) produce one intermediate state between two stable on and off states due to the change in the threshold voltage. A circuit model based on Berkeley Short-channel IGFET Model (BSIM) that accounts for this intermediate state is developed. Different ternary logics such as ternary logic inverter, MAX-MIN functions, multiplier, comparator, etc. can be implemented using QDGFETs. In this work the designs of ternary logic AND and OR gate based on QDGFET is introduced. Increased number of states in three state QDGFETs will increase the number of bit handling capability of this device and will help to handle more bits at a time with less circuit elements.

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  1. Intel Corporation, Hillsboro, OR, 97124, USA

    Supriya Karmakar

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  1. Supriya Karmakar
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Correspondence to Supriya Karmakar.

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Karmakar, S. Ternary Logic Gates Using Quantum Dot Gate FETs (QDGFETs). Silicon 6, 169–178 (2014). https://doi.org/10.1007/s12633-013-9175-x

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  • DOI: https://doi.org/10.1007/s12633-013-9175-x

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