Barrier height modification in Au/Ti/n-GaAs devices with a $\hbox {HfO}_{2}$ interfacial layer formed by atomic layer deposition

Abstract

X-ray photoelectron spectroscopy has been carried out to characterize the surface of the hafnia $(\hbox {HfO}_{2})$ thin films grown on n-GaAs wafer by atomic layer deposition, and the surface morphology of the $\hbox {HfO}_{2}$ layer on GaAs has been analysed using atomic force microscopy. The barrier height (BH) values of 1.03 and 0.93 eV (300 K) for the Au/Ti/$\hbox {HfO}_{2}$/n-GaAs structures with 3- and 5-nm $\hbox {HfO}_{2}$ interfacial layers, respectively, have been obtained from the I–V characteristics of the devices, which are higher than the value of 0.77 eV (300 K) for the Au/Ti/n-GaAs diode fabricated by us. Therefore, it can be said that the $\hbox {HfO}_{2}$ thin layer at the metal/GaAs interface can also be used for BH modification as a gate insulator in GaAs metal-oxide semiconductor (MOS) capacitors and MOS field-effect transistors. The ideality factor values have been calculated as 1.028 and 2.72 eV at 400 and 60 K; and as 1.04 and 2.58 eV at 400 and 60 K for the metal–insulating layer–semiconductor (MIS) devices with 3- and 5-nm interfacial layers, respectively. The bias-dependent BH values have been calculated for the devices by both Norde’s method and Gaussian distribution (GD) of BHs at each sample temperature. At 320 K, the $\Phi$$_\mathrm{b}(V)$ value at 0.70 V for a 3-nm MIS diode is about 1.08 eV from the $\Phi$$_\mathrm{b}(V)$ vs. V curve determined by the GD, and about 0.99 eV at 0.58 V for a 5-nm MIS diode. It has been seen that these bias-dependent BH values are in close agreement with those obtained by Norde’s method for the same bias voltage values.