Abstract
Copper (Cu) pillar bumps tend to induce high thermal–mechanical stress during environmental tests and fabrication processes due to the high hardness of Cu, especially when applied with an ultralow-K (ULK) chip. A previous experiment showed that interfacial delamination was often observed in the ULK layers of conventional Cu pillar bump-type flip chip ball grid array (FCBGA) packages under thermal cycling, where under bump metallurgy (UBM) layers directly sit on the metal pads of silicon chips (herein termed ‘‘direct UBM structure’’). In this study, a UBM pad relocation scheme through redistribution layer (RDL) technology (herein termed ‘‘RDL UBM structure’’) is proposed to relieve the stress or ULK delamination issue. The proposed technique is tested on Cu pillar bump-type FCBGA packages subjected to thermal loading, the effectiveness of which is demonstrated through finite element stress simulation and experimental reliability tests. Simulation results reveal that the RDL UBM structure can greatly reduce the maximum stress in the ULK layers by as much as about 10% to 44%. Besides, it turns out that the Cu pillar bump-type FCBGA packages with the RDL UBM structure show good interconnect reliability performance in terms of thermal cycling, highly accelerated stress, and high-temperature storage.
Similar content being viewed by others
References
Y. Orii, K. Toriyama, S. Kohara, and H. Noma, 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), Taiwan (2011), pp. 206–209.
A. Syed, K. Dhandapani, R. Moody, and L. Nicholls, IEEE 61st Electronic Components and Technology Conference (ECTC), USA (2011), pp. 332–339.
M. Huang, O.G. Yeow, C.Y. Poo, and T. Jiang, IEEE Trans. Compon. Packag. Technol. 31, 767 (2008).
Y.S. Lai, Y.T. Chiu, C.W. Lee, and Y. H. Shao, 58th Electronic Components and Technology Conference (ECTC), USA (May 2008), pp. 330–335.
Y. Orii, K. Toriyama, S. Kohara, and H. Noma, 61st Electronic Components and Technology Conference (ECTC), USA (May 2011), pp. 340–345.
R. Mandal and Y.C. Mui, 10th Electronics Packaging Technology Conference (EPTC), Singapore (2008), pp. 1184–1189.
C.T. Feng, M. Hsu, S.C. Hsu, and W. Chang, IEEE International Symposium on Advanced Packaging Materials (APM), USA (March 2013), pp. 15–24.
J.R. Zhou, M.Y. Tsai, C.Y. Wu, and K.M. Chen, 5th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), Taiwan (2010), pp. 1–4.
X.R. Zhang, W.H. Zhu, B.P. Liew, and M. Gaurav, 11th International Conference on Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE), France (2010), pp. 1–7.
K.M. Chen and T.S. Lin, J. Mater. Sci. Mater. Electron. 21, 278 (2010).
M.W. Lee, J.Y. Kim, J.D. Kim, and C.H. Lee, 60th Electronic Components and Technology Conference (ECTC), USA (June 2010), pp. 1623–1630.
R. Katkar, M. Huynh, R. Zhang, and L. Mirkarimi, 61st Electronic Components and Technology Conference (ECTC), USA (May 2011), pp. 965–970.
C.T. Peng, C.M. Liu, J.C. Lin, H.C. Cheng, and K.N. Chiang, IEEE Trans. Compon. Packag. Technol. 27, 684 (2004).
H.C. Cheng, W.R. Ciou, W.-H. Chen, J.L. Kuo, H.C. Lu, and R.B. Wu, Appl. Therm. Eng. 53, 78 (2013).
JEDEC Standard JESD22-A104D, Temperature Cycling (March 2009).
R.A. Schapery, J. Compos. Mater. 2, 380 (1968).
W.H. Chen, H.C. Cheng, Y.C. Hsu, R.H. Uang, and J.S. Hsu, Compos. Sci. Technol. 68, 3388 (2008).
H.-C. Cheng, Y.M. Tsai, S.T. Lu, J.Y. Juang, and W.H. Chen, IEEE Trans. Compon. Packag. Manuf. Technol. 3, 2037 (2013).
C.Y. Cao, Q.-H. Qin, and A.B. Yu, J. Mech. 29, 661 (2013).
H.C. Cheng, C.H. Ma, C.F. Yu, S.T. Lu, and W.H. Chen, Comput. Mater. Contin. 38, 129, 2013.
Acknowledgements
The authors would like to thank the Ministry of Science and Technology of the Republic of China, Taiwan, for partial financial support of this research under Contract No. MOST 103-2221-E-035-024-MY3.
Author information
Authors and Affiliations
Corresponding authors
Rights and permissions
About this article
Cite this article
Chen, K.M., Wu, C.Y., Wang, C.H. et al. An RDL UBM Structural Design for Solving Ultralow-K Delamination Problem of Cu Pillar Bump Flip Chip BGA Packaging. J. Electron. Mater. 43, 4229–4240 (2014). https://doi.org/10.1007/s11664-014-3332-x
Received:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s11664-014-3332-x