Skip to main content
Log in

Investigation on mechanism of polymer filling in high-aspect-ratio trenches for through-silicon-via (TSV) application

  • Article
  • Published:
Science China Technological Sciences Aims and scope Submit manuscript

Abstract

Vacuum-assisted spin-coating is an effective polymer filling technology for sidewall insulating of through-silicon-via (TSV). This paper investigated the flow mechanism of the vacuum-assisted polymer filling process based on experiments and numerical simulation, and studied the effect of vacuum pressure, viscosity of polymer and aspect-ratio of trench on the filling performance. A 2D axisymmetric model, consisting of polymer partially filled into the trench and void at the bottom of trench, was developed for the computational fluid dynamics (CFD) simulation. The simulation results indicate that the vacuum-assisted polymer filling process goes through four stages, including bubble formation, bubble burst, air elimination and polymer re-filling. Moreover, the simulation results suggest that the pressure significantly affects the bubble formation and the polymer re-filling procedure, and the polymer viscosity and the trench aspect-ratio influence the duration of air elimination.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

References

  1. Lu J Q. 3-D hyperintegration and packaging technologies for micronano systems. P IEEE, 2009, 97: 18–30

    Article  Google Scholar 

  2. Patti R S. Three-dimensional integrated circuits and the future of system-on-chip designs. P IEEE, 2006, 94: 1214–1224

    Article  Google Scholar 

  3. Farooq M G, Iyer S S. 3D integration review. Sci China Inf Sci, 2011, 54: 1012–1025

    Article  Google Scholar 

  4. Koester S J, Young A M, Yu R R, et al. Wafer-level 3D integration technology. IBM J Res Dev, 2008, 52: 583–597

    Article  Google Scholar 

  5. Sunohara M, Tokunaga T, Kurihara T, et al. Silicon interposer with TSVs (through silicon vias) and fine multilayer wiring. Electronic Components and Technology Conference(ECTC), Lake Buena Vista, Florida, 2008: 847–852

    Google Scholar 

  6. Tu K N, Tian T. Metallurgical challenges in microelectronic 3D IC packaging technology for future consumer electronic products. Sci China Tech Sci, 2013, 56: 1740–1748

    Article  Google Scholar 

  7. Knickerbocker J U, Andry P S, Dang B, et al. Three-dimensional silicon integration. IBM J Res Dev, 2008, 52: 553–569

    Article  Google Scholar 

  8. Topol A W, Tulipe D L, Shi L, et al. Three-dimensional integrated circuits. IBM J Res Dev, 2006, 50: 491–506

    Article  Google Scholar 

  9. Ranganathan N, Youhe L, Lo G Q, et al. Influence of Bosch etch process on electrical isolation of TSV structures. IEEE T Compon Pack, 2011, 1: 1497–1507

    Google Scholar 

  10. Archard D, Giles K, Price A, et al. Low temperature PECVD of dielectric films for TSV applications. Electronic Components and Technology Conference (ECTC), Las Vegas, Nevada, 2010: 764–768

    Google Scholar 

  11. Beica R, Siblerud P, Sharbono C, et al. Advanced metallization for 3D integration. Electronics Packaging Technology Conference (EPTC), Singapore, 2008: 212–218

    Google Scholar 

  12. Duval F F, Okoro C, Civale Y, et al. Polymer filling of silicon trenches for 3-D through silicon vias applications. IEEE T Compon Pack, 2011, 1: 825–832

    Google Scholar 

  13. Chausse P, Bouchoucha M, Henry D, et al. Polymer filling of medium density through silicon via for 3D-packaging. Electronics Packaging Technology Conference (EPTC), Singapore, 2009: 790–794

    Google Scholar 

  14. Coudrain P, Colonna J P, Aumont C, et al. Towards efficient and reliable 300 mm 3D technology for wide I/O interconnects. Electronics Packaging Technology Conference (EPTC), Singapore, 2012: 330–335

    Google Scholar 

  15. Duval F, Tezcan D S, Swinnen B, et al. Polymer deep trench filling for Through Silicon Via technology. 13th Meeting for the Symposium on Polymers for Microelectronics, Wilmington, Delaware, 2008

    Google Scholar 

  16. Wilke M, Wippermann F, Zoschke K, et al. Prospects and limits in wafer-level-packaging of image sensors. Electronic Components and Technology Conference (ECTC), Lake Buena Vista, Florida, 2011: 1901–1907

    Google Scholar 

  17. Truzzi C, Raynal F, Mevellec V. Wet-process deposition of TSV liner and metal films. IEEE 3D System Integration Conference, San Francisco, California, 2009

    Google Scholar 

  18. Tezcan D S, Duval F, Philipsen H, et al. Scalable through silicon via with polymer deep trench isolation for 3D wafer level packaging. Electronic Components and Technology Conference (ECTC), San Diego, California, 2009

    Google Scholar 

  19. Trichur R K, Fowler M, McCutcheon J W, et al. Filling and Planarizing Deep Trenches with Polymeric Material for Through-Silicon Via Technology. 43rd International Symposium on Microelectronics, Raleigh, North Carolina, 2010: 192–196.

    Google Scholar 

  20. Kotb H E M, Isoird K, Morancho F, et al. Filling of very deep, wide trenches by Benzocyclobutene polymer. Microsyst Tech, 2009, 15: 1395–1400

    Article  Google Scholar 

  21. Chen Q, Huang C, Wang Z. Benzocyclobutene polymer filling of high aspect-ratio annular trenches for fabrication of through-iliconias (TSVs). Microelectron Reliab, 2012, 52: 2670–2676

    Article  Google Scholar 

  22. Chen Q, Huang C, Tan Z, et al. Low capacitance through-silicon-vias with uniform benzocyclobutene insulation layers. IEEE T Compon Pack, 2013, 3: 724–731

    Google Scholar 

  23. Batchelor G K. An Introduction to Fluid Dynamics. Cambridge Univ Press, United Kingdom, 2000

    Book  Google Scholar 

  24. Brackbill J U, Kothe D B, Zemach C. A continuum method for modeling surface tension. J Comput Phys, 1992, 100: 335–354

    Article  MATH  MathSciNet  Google Scholar 

  25. http://www.dow.com/cyclotene/prod/302235.htm (Processing Procedures for CYCLOTENE 3000 Series Dry Etch Resins) last accessed: June 5, 2013

  26. Hirt C W, Nichols B D. Volume of fluid (VOF) method for the dynamics of free boundaries. J Comput Phys, 1981, 39: 201–225

    Article  MATH  Google Scholar 

  27. Kulkarni A A, Joshi J B. Bubble formation and bubble rise velocity in gas-liquid systems: A review. Ind Eng Chem Res, 2005, 44: 5873–5931

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to YueYang Chen.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Ding, Y., Yan, Y., Chen, Q. et al. Investigation on mechanism of polymer filling in high-aspect-ratio trenches for through-silicon-via (TSV) application. Sci. China Technol. Sci. 57, 1616–1625 (2014). https://doi.org/10.1007/s11431-014-5551-z

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11431-014-5551-z

Keywords

Navigation