Abstract
The search for alternate information processing technologies to sustain Moore's Law improvements beyond those attainable by scaling of charge-based devices encompasses several key technologies. Some of these technologies were explored at the Third Workshop on Silicon Nanoelectronics and Beyond (SNB III) held at the National Science Foundation in Washington DC in December 2005. They included: (1) non-charge-based devices; (2) devices operated out of thermal equilibrium; (3) alternative interconnect systems; (4) thermal extraction limits and technologies; and (5) fabrication via directed self-assembly. Although this paper was inspired by this highly successful workshop, it is not intended as a summary, but rather an assessment by the authors of some of the fundamental physical considerations evident at the present time.
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Acknowledgements
The authors are grateful to George Bourianoff from Intel Corp. for his help with Section Devices operated out of thermal equilibrium (devices operated out of thermal equilibrium) and for a thoughtful review of the paper.
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Cavin, R.K., Zhirnov, V.V., Herr, D.J.C. et al. Research directions and challenges in nanoelectronics. J Nanopart Res 8, 841–858 (2006). https://doi.org/10.1007/s11051-006-9123-4
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DOI: https://doi.org/10.1007/s11051-006-9123-4