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From Microelectronics to Nanoelectronics: Fifty Years of Advancements in Electronics

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The First Outstanding 50 Years of “Università Politecnica delle Marche”

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Abstract

Fifty years ago, when the Università Politecnica delle Marche (UnivPM) was founded, the minimum size of an electron device was about ten micrometers, today dimensions in the order of twenty nanometers can be reached by the current technologies. At that time silicon foundries were able to integrate about tens of components on a chip, after fifty years has passed, an integrated circuit (IC) might contain more than ten billion devices. As the need for increasing integrated density on chips continues and silicon technologies show their physical limits, the new era of nanotechnologies, that have the potentiality for circumventing these limits, is coming. The aim of this paper is to highlight some key aspects that determined this rapid advancement and to discuss the contributions given by UnivPM both in microelectronics and nanoelectronics during these five decades. In particular, in the context of microelectronics the paper focuses on research activity in the fields of device modeling, tolerance analysis, statistical analysis of ICs, statistical simulation and design of ICs. With regard to nanoelectronics, the recently discovered nanosize materials, such as atomic clusters, nanotubes/nanowires, and monoatomic layers, may constitute a new scalable platform for RF electronics, namely for switches, amplifiers, logic devices, frequency multipliers, rectifies, interconnects, and sensors. In this framework, the present contribution provides a view on the most recent developments in modelling and simulation of carbon based devices. Specifically, we describe rigorous multi-physics approaches for the analysis of quantum transport and electromagnetic fields in nanostructured materials. In addition, we show that the low profile and size of nanomaterials make them perfect candidates as test beds for novel experiments on single electron devices and quantum transistors. Finally, the paper will give a brief excursus of the activity in progress at UnivPM, taking a look at the future development in electronics.

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References

  1. Biagetti G, Orcioni S, Signoracci L, Turchetti C, Crippa P, Alessandrini M (2002) SiSMA: A statistical simulator for mismatch analysis of MOS ICs. In: IEEE/ACM international conference on computer aided design (ICCAD), Dig Tech Papers, pp 490–496

    Google Scholar 

  2. Biagetti G, Conti M, Orcioni S (2004a) Multistable circuits for analog memories implementation. Analog Integr Circuits Signal Process 39(1):109–122

    Article  Google Scholar 

  3. Biagetti G, Orcioni S, Turchetti C, Crippa P, Alessandrini M (2004b) SiSMA—a tool for efficient analysis of analog CMOS integrated circuits affected by device mismatch. IEEE Trans Comput Aided Design Integr Circuits Syst 23(2):192–207

    Article  Google Scholar 

  4. Biagetti G, Crippa P, Curzi A, Orcioni S, Turchetti C (2008) A novel approach to statistical simulation of ICs affected by non-linear variabilities. In: Proceedings of 2008 IEEE internatonal symposium on circuits and systems (ISCAS). Seattle, WA, pp 2985–2988

    Google Scholar 

  5. Biagetti G, Crippa P, Curzi A, Orcioni S, Turchetti C (2010) Piecewise linear second moment statistical simulation of ICs affected by non-linear statistical effects. Int J Circuit Theory Appl 38(9):969–993

    Article  Google Scholar 

  6. Caldari M, Conti M, Crippa P, Nuzzo G, Orcioni S, Turchetti C (2002) Instruction based power consumption estimation methodology. In: 9th international conference on electronics, circuits and systems (ICECS), vol 2, Dubrovnik, Croatia, pp 721–724

    Google Scholar 

  7. Conti M, Moretti D (2005) System level analysis of the bluetooth standard. In: DATE’05, vol 3, Munich, Germany, pp 118–123

    Google Scholar 

  8. Conti M, Crippa P, Guaitini G, Orcioni S, Turchetti C (1998a) A current driven, programmable gain differential pair using MOS translinear circuits. In: Proceedigs of 1998 IEEE international symposium on circuits and systems (ISCAS), Monterey, CA, USA, pp I543–I546

    Google Scholar 

  9. Conti M, Crippa P, Orcioni S, Turchetti C (1998b) Statistical modeling of MOS transistors. In: Proceedings of 1998 3rd international workshop on statistical metrology (IWSM), IEEE, Honolulu, HI, USA, pp 92–95

    Google Scholar 

  10. Conti M, Crippa P, Guaitini G, Orcioni S, Turchetti C (1999a) An analog CMOS approximate identity neural network with stochastic learning and multilevel weight storage. IEICE Trans Fundam Electron Commun Comput Sci E82-A(7):1344–1356

    Google Scholar 

  11. Conti M, Crippa P, Orcioni S, Turchetti C (1999b) Current-mode circuit for fuzzy partition membership functions. In: Proceedings of 1999 IEEE international symposium on circuits and systems (ISCAS), vol 5, Orlando, FL, USA, pp 391–394

    Google Scholar 

  12. Conti M, Crippa P, Orcioni S, Turchetti C (1999c) Parametric yield formulation of MOS IC’s affected by mismatch effect. IEEE Trans Comput Aided Design Integr Circuits Syst 18(5):582–596

    Article  Google Scholar 

  13. Conti M, Crippa P, Orcioni S, Turchetti C (1999d) Statistical modeling of MOS transistor mismatch based on the parameters’ autocorrelation function. In: Proceeding of 1999 IEEE international symposium on circuits and systems (ISCAS), vol 6, Orlando, FL, USA, pp 222–225

    Google Scholar 

  14. Conti M, Crippa P, Orcioni S, Turchetti C, Scolastra S (1999e) A current mode multilevel memory using flash A/D converters. In: Proceeding of 6th IEEE international conference on electronics, circuits and System (ICECS), vol 3, Pafos, Cyprus, pp 1627–1630

    Google Scholar 

  15. Conti M, Crippa P, Orcioni S, Turchetti C, Catani V (2000) Fuzzy controller architecture using fuzzy partition membership functions. In: Proceeding of 4th international conference on knowledge-based intelligent engineering systems and allied technologies (KES 2000), vol 2, IEEE, Brighton, UK, pp 864–867

    Google Scholar 

  16. Conti M, Crippa P, Orcioni S, Turchetti C (2001a) Parametric yield optimization of MOS IC’s affected by device mismatch. Analog Integr Circuits Signal Process 29(3):181–199

    Article  Google Scholar 

  17. Conti M, Crippa P, Orcioni S, Turchetti C, Ricciardi F, Vece GB (2001b) A new test structure for short and long distance mismatch characterization of submicron MOS transistors. In: Proceedings of 2001 midwest symposium on circuits and systems (MWSCAS), vol 2, Dayton, OH, USA, pp 656–659

    Google Scholar 

  18. Conti M, Crippa P, Orcioni S, Pesare M, Turchetti C, Vendrame L, Lucherini S (2002a) A new methodology for the statistical analysis of VLSI CMOS circuits and its application to flash memories. In: Proceedings of 2002 IEEE International Symposium on Circuits and Systems (ISCAS), vol 5, Phoenix, AZ, USA, pp 89–92

    Google Scholar 

  19. Conti M, Crippa P, Orcioni S, Turchetti C (2002b) Layout-based statistical modeling for the prediction of the matching properties of MOS transistors. IEEE Trans Circuits Syst I 49(5):680–685

    Article  Google Scholar 

  20. Conti M, Crippa P, Fedecostante F, Orcioni S, Ricciardi F, Turchetti C, Vendrame L (2003a) A modular test structure for CMOS mismatch characterization. In: Proceedings of 2003 IEEE International Symposium on Circuits and Systems (ISCAS), vol 5, Bangkok, Thailand, pp V569–V572

    Google Scholar 

  21. Conti M, Crippa P, Orcioni S, Pesare M, Turchetti C, Vendrame L, Lucherini S (2003b) An integrated CAD methodology for yield enhancement of VLSI CMOS circuits including statistical device variations. Analog Integr Circuits Signal Process 37(2):85–102

    Article  Google Scholar 

  22. Conti M, Caldari M, Vece GB, Orcioni S, Turchetti C (2004) Performance analysis of different arbitration algorithms of the AMBA AHB bus. In: Proceedings of 41st design automation conference (DAC), pp 618–621

    Google Scholar 

  23. Conti M, Caldari M, Gianfelici M, Ricci A, Ripa F (2018) SystemC/TLM controller for efficient NAND flash management in electronic musical instruments. Electronics 7(5):75

    Article  Google Scholar 

  24. Crippa P, Conti M, Turchetti C (2001a) A statistical methodology for the design of high-performance current steering DAC’s. In: Proceedings of 2001 IEEE international symposium on circuits and systems (ISCAS), vol 5, Sydney, NSW, Australia, pp 311–314

    Google Scholar 

  25. Crippa P, Turchetti C, Conti M (2001b) A statistical MOS model for CAD of submicrometer analog IC’s. In: Proceedings of 2001 Midwest Symposium on Circuits and Systems (MWSCAS), vol 2, Dayton, OH, USA, pp 901–904

    Google Scholar 

  26. Crippa P, Turchetti C, Conti M (2002) A statistical methodology for the design of high-performance CMOS current-steering digital-to-analog converters. IEEE Trans Comput Aided Design Integr Circuits Syst 21(4):377–394

    Article  Google Scholar 

  27. Crippa P, Orcioni S, Ricciardi F, Turchetti C (2003) Design of a 4.4 to 5 GHz LNA in 0.25-\(\upmu \)m SiGe BiCMOS technology. In: Proceedings of 2003 IEEE international symposium on circuits and systems (ISCAS), vol 1, Bangkok, Thailand, pp I333–I336

    Google Scholar 

  28. Crippa P, Orcioni S, Ricciardi F, Turchetti C (2004a) A 4.4 to 5 GHz SiGe low noise amplifier. Appl Surf Sci 224(1–4):429–433

    Article  Google Scholar 

  29. Crippa P, Orcioni S, Ricciardi F, Turchetti C (2004b) A DC-5 GHz NMOSFET SPDT T/R switch in 0.25-\(\mu \)m SiGe BiCMOS technology. Appl Surf Sci 224(1–4):434–438

    Google Scholar 

  30. Edwards JR, Marr G (1973) Depletion-mode IGFET made by deep ion implantation. IEEE Trans Electron Devices 20(3):283–289

    Article  Google Scholar 

  31. Giammarini M, Conti M, Orcioni S (2011a) System-level energy estimation with Powersim. In: 2011 18th IEEE international conference on electronics, circuits, and Systems (ICECS), pp 723–726

    Google Scholar 

  32. Giammarini M, Orcioni S, Conti M (2011b) Powersim: power estimation with systemC. Springer, Netherlands, Dordrecht, pp 285–300

    Google Scholar 

  33. Klein T (1969) Technology and performance of integrated complementary MOS circuits. IEEE J Solid State Circuits 4(3):122–130

    Article  Google Scholar 

  34. Krajewska G, Holmes FE (1979) Macromodeling of FET/bipolar operational amplifiers. IEEE J Solid State Circuits 14(6):1083–1087

    Article  Google Scholar 

  35. Lallement G, Abouzeid F, Cochet M, Daveau J-M, Roche P, Autran J-L (2018) A 2.7 pj/cycle 16 MHz, 0.7 \(\mu \)w deep sleep power ARM Cortex-M0+ core SoC in 28 nm FD-SOI. IEEE J Solid State Circuits

    Google Scholar 

  36. Li M, Francavilla MA, Vipiana F, Vecchi G, Chen R (2014) Nested equivalent source approximation for the modeling of multiscale structures. IEEE Trans Antennas Propag 62(7):3664–3678

    Article  Google Scholar 

  37. Maci S, Minatti G, Casaletti M, Bosiljevac M (2011) Metasurfing: Addressing waves on impenetrable metasurfaces. IEEE Antennas Wireless Propag Lett 10:1499–1502

    Article  Google Scholar 

  38. Mancini P, Turchetti C, Masetti G (1987) A non-quasi-static analysis of the transient behavior of the long-channel most valid in all regions of operation. IEEE Trans Electron Devices 34(2):325–334

    Article  Google Scholar 

  39. Martini E, Sardi GM, Maci S (2014) Homogenization processes and retrieval of equivalent constitutive parameters for multisurface-metamaterials. IEEE Trans Antennas Propag 62(4):2081–2092

    Article  Google Scholar 

  40. Mencarelli D, Pierantoni L (2016) Rigorous simulation of ballistic graphene-based transistor. 2016 IEEE MTT-S international microwave symposium (IMS), pp 1–4

    Google Scholar 

  41. Mencarelli D, Rozzi T, Pierantoni L (2010) Scattering matrix approach to multichannel transport in many lead graphene nanoribbons. Nanotechnology 21(15):155701

    Article  Google Scholar 

  42. Mencarelli D, Pierantoni L, Farina M, Di Donato A, Rozzi T (2011) A multichannel model for the self-consistent analysis of coherent transport in graphene nanoribbons. ACS Nano 5(8):6109–6118

    Article  Google Scholar 

  43. Meyer JE (1971) MOS models and circuit simulations. RCA review 32(1):42–63

    Google Scholar 

  44. Moore GE (1965) Cramming more components onto integrated circuits. Electronics 38(8):114–117

    Google Scholar 

  45. Nagel LW (1975) SPICE2: A computer program to simulate semiconductor circuits. PhD thesis, EECS Department, University of California, Berkeley

    Google Scholar 

  46. Oh S-Y, Ward DE, Dutton RW (1980) Transient analysis of MOS transistors. IEEE Trans Electron Devices 27(8):1571–1578

    Article  Google Scholar 

  47. Orcioni S, Biagetti G, Conti M (2006) SystemC-WMS: mixed-signal simulation based on wave exchanges. Springer, Netherlands, Dordrecht, pp 171–185

    Google Scholar 

  48. Orcioni S, Ballicchia M, Biagetti G, d’Aparo RD, Conti M (2008) System level modelling of RF IC in SystemC-WMS. EURASIP J Embed Syst 1:371768

    Article  Google Scholar 

  49. Pao HC, Sah C-T (1966) Effects of diffusion current on characteristics of metal-oxide (insulator)-semiconductor transistors. Solid-State Electronics 9(10):927–937

    Article  Google Scholar 

  50. Pederson D (1984) A historical review of circuit simulation. IEEE Trans Circuits Syst 31(1):103–111

    Article  Google Scholar 

  51. Pierantoni L, Mencarelli D, Rozzi T (2008) A new 3-D transmission line matrix scheme for the combined Schrödinger-Maxwell problem in the electronic/electromagnetic characterization of nanodevices. IEEE Trans Microw Theory Techn 56(3):654–662

    Article  Google Scholar 

  52. Pierantoni L, Mencarelli D, Rozzi T (2009) Boundary immittance operators for the Schrödinger-Maxwell problem of carrier dynamics in nanodevices. IEEE Trans Microw Theory Techn 57(5):1147–1155

    Article  Google Scholar 

  53. Schwierz F (2010) Graphene transistors. Nature Nanotechnology 5(7):487

    Article  Google Scholar 

  54. Solomon JE (1974) The monolithic op amp: a tutorial study. IEEE J Solid State Circuits 9(6):314–332

    Article  Google Scholar 

  55. Tarui Y, Hayashi Y, Koyanagi T, Yamamoto H, Shiraishi M, Kurosawa T (1969) A 40-ns 144-bit n-channel MOS-LSI memory. IEEE J Solid State Circuits 4(5):271–279

    Article  Google Scholar 

  56. Turchetti C (1983) Relationships for the drift and diffusion components of the drain current in an MOS transistor. Electron Lett 19(23):960–962

    Article  Google Scholar 

  57. Turchetti C, Masetti G (1983) A macromodel for integrated all-MOS operational amplifiers. IEEE J Solid State Circuits 18(4):389–394

    Article  Google Scholar 

  58. Turchetti C, Masetti G (1984) A CAD-oriented analytical MOSFET model for high-accuracy applications. IEEE Trans Comput Aided Design Integr Circuits Syst 3(2):117–122

    Article  Google Scholar 

  59. Turchetti C, Masetti G (1985a) Analysis of the depletion-mode MOSFET including diffusion and drift currents. IEEE Trans Electron Devices 32(4):773–782

    Article  Google Scholar 

  60. Turchetti C, Masetti G (1985b) Influence of diffusion current on the DC and AC characteristics of the junction field-effect transistor. IEEE Electron Device Lett 6(1):57–59

    Article  Google Scholar 

  61. Turchetti C, Masetti G (1986) A charge-sheet analysis of short-channel enhancement-mode MOSFETs. IEEE J Solid State Circuits 21(2):267–275

    Article  Google Scholar 

  62. Turchetti C, Masetti G, Tsividis Y (1983) On the small-signal behaviour of the MOS transistor in quasistatic operation. Solid-State Electron 26(10):941–948

    Article  Google Scholar 

  63. Turchetti C, Prioretti P, Masetti G, Profumo E, Vanzi M (1986) A Meyer-like approach for the transient analysis of digital MOS IC’s. IEEE Trans Comput Aided Design Integr Circuits Syst 5(4):499–507

    Article  Google Scholar 

  64. Vece GB, Conti M (2009) Power estimation in embedded systems within a SystemC-based design context: the PKtool environment. In: 2009 7th workshop on intelligent solutions in embedded systems, pp 179–184

    Google Scholar 

  65. Vece GB, Conti M, Orcioni S (2015) Transaction-level power analysis of VLSI digital systems. Integration 50:116–126

    Article  Google Scholar 

  66. Ward DE, Dutton RW (1978) A charge-oriented model for MOS transistor capacitances. IEEE J Solid State Circuits 13(5):703–708

    Article  Google Scholar 

  67. de Wiele FV (1979) A long-channel MOSFET model. Solid State Electron 22(12):991–997

    Article  Google Scholar 

  68. Yang P, Chatterjee PK (1982) SPICE modeling for small geometry MOSFET circuits. IEEE Trans Comput Aided Design Integr Circuits Syst 1(4):169–182

    Google Scholar 

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Acknowledgements

The authors would like to thank Laura Falaschetti for her comments and valuable contribution to the editing process of the paper.

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Authors and Affiliations

  1. Department of Information Engineering, Università Politecnica delle Marche, Via Brecce Bianche 12, 60131, Ancona, Italy

    Giorgio Biagetti, Massimo Conti, Paolo Crippa, Davide Mencarelli & Claudio Turchetti

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  1. Giorgio Biagetti
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  2. Massimo Conti
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  3. Paolo Crippa
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  4. Davide Mencarelli
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  5. Claudio Turchetti
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Corresponding author

Correspondence to Paolo Crippa .

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Editors and Affiliations

  1. Department of Information Engineering (DII), Marche Polytechnic University, Ancona, Italy

    Sauro Longhi

  2. Department of Information Engineering (DII), Marche Polytechnic University, Ancona, Italy

    Andrea Monteriù

  3. Department of Information Engineering (DII), Marche Polytechnic University, Ancona, Italy

    Alessandro Freddi

  4. Department of Information Engineering (DII), Marche Polytechnic University, Ancona, Italy

    Emanuele Frontoni

  5. Department of Industrial Engineering and Mathematical Sciences (DIISM), Marche Polytechnic University, Ancona, Italy

    Michele Germani

  6. Department of Industrial Engineering and Mathematical Sciences (DIISM), Marche Polytechnic University, Ancona, Italy

    Gian Marco Revel

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Biagetti, G., Conti, M., Crippa, P., Mencarelli, D., Turchetti, C. (2019). From Microelectronics to Nanoelectronics: Fifty Years of Advancements in Electronics. In: Longhi, S., Monteriù, A., Freddi, A., Frontoni, E., Germani, M., Revel, G. (eds) The First Outstanding 50 Years of “Università Politecnica delle Marche”. Springer, Cham. https://doi.org/10.1007/978-3-030-32762-0_1

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  • DOI: https://doi.org/10.1007/978-3-030-32762-0_1

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