Skip to main content
SpringerLink
Log in

Study of the effect of thermal annealing on high k hafnium oxide thin film structure and electrical properties of MOS and MIM devices

  • Published:
Journal of Materials Science: Materials in Electronics Aims and scope Submit manuscript

Abstract

The effect of rapid thermal annealing on structural and electrical properties of high k HfO2 thin films is investigated. The films were initially deposited at pre-optimized sputtering voltage of 0.8 kV and substrate bias of 80 V in order to get optimized results for oxide charges and leakage current as a MOS device. The film properties were investigated for optimum annealing temperature in oxygen and optimum rapid thermal annealing temperature in nitrogen respectively to get the best electrical results as a MOS device structure. The film thickness, composition and microstructure is studied by Laser Ellipsometry, XRD and AFM and the effect of thermal annealing is shown. The electrical I–V and C–V characteristics of the annealed dielectric film were investigated employing Al-HfO2-Si MOS capacitor structure. The flat-band voltage (V fb) and oxide-charge density (Q ox) were extracted from the high-frequency C–V curve. Dielectric study were further carried out on HfO2 thin films having metal–insulator–metal (MIM) configuration over a wide temperature (300–500 K) and frequency (100 Hz to 1 MHz) range.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12

Similar content being viewed by others

References

  1. H. Wong, H. Iwai, Microelectronic Eng. 83, 1867–1904 (2006)

    Article  CAS  Google Scholar 

  2. H. Wong, H. Iwai, Physics World 18(9), 40 (2005)

    Google Scholar 

  3. H. Iwai, H.S. Momose, in IEDM Technical Digest (1998), pp. 163–166

  4. S.H. Lo, D.A. Buchanan, Y. Taur, W. Wang, IEEE Electron Device Lett. 18, 206 (1997)

    Article  Google Scholar 

  5. B. Yu, H. Wang, C. Ricobene, Q. Xiang, M. R. Lin, in VLSI Technology Digest (2000), pp. 39–40

  6. D. Misra, H. Iwai, H. Wong, Electrochem. Soc. Interface 14(2), 30 (2005)

    CAS  Google Scholar 

  7. B. Sen, C.K. Sarkar, H. Wong, M. Chan, C.W. Kok, Solid State Electron. 50, 237 (2006)

    Article  CAS  Google Scholar 

  8. M. Housa, High k Gate Dielectric (IPO, Bristal, 2004), Chapter 1

  9. G.D. Wilk, R. Wallance, G. Anthony, J. Appl. Phys. 87, 5243 (2001)

    Article  Google Scholar 

  10. Y.H. Kim, J.C. Lee, Microelectron. Reliab. 44, 183 (2004)

    Article  CAS  Google Scholar 

  11. H. Kim, P.C. McLntyre, K.C. Saraswat, Appl. Phys. Lett. 82, 106 (2003)

    Article  CAS  Google Scholar 

  12. R.K. Nahar, V. Singh, A. Sharma, J. Mater. Sci. Mater. Electron. 18, 615 (2007)

    Article  CAS  Google Scholar 

Download references

Acknowledgments

The authors would like to thank the Director CEERI Pilani for providing the facilities for the work. Mr. Vikram Singh and Mr. R. S. Shekhawat are thanked for the experimental support. The authors would like to thank Dr. Shomna Mahajan at SSPL, New Delhi for experiments on Rapid Thermal Annealing. Prof. V. Ramgopal Rao of Electrical Engineering Department, Indian Institute of Technology, Bombay, is specially thanked for useful suggestion and support for electrical characterization. The financial support was provided by CSIR under ES scheme and AICTE, New Delhi under RPS scheme which is thankfully acknowledged.

Author information

Authors and Affiliations

  1. Electronics and Communication Engineering, Indian Institute for Information Technology Design and Manufacturing, PDPM-IIITD&M Jabalpur, Jabalpur, Madhya Pradesh, 482005, India

    A. Srivastava

  2. Department of Electronics & Telecommunication Engineering, Jadavpur University, Kolkata, India

    A. Srivastava & C. K. Sarkar

  3. Sensors and Nanotechnology Group, Central Electronics Engineering Research Institute (CSIR, New Delhi), Pilani, Rajasthan, 333031, India

    R. K. Nahar

Authors
  1. A. Srivastava
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. R. K. Nahar
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. C. K. Sarkar
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to A. Srivastava.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Srivastava, A., Nahar, R.K. & Sarkar, C.K. Study of the effect of thermal annealing on high k hafnium oxide thin film structure and electrical properties of MOS and MIM devices. J Mater Sci: Mater Electron 22, 882–889 (2011). https://doi.org/10.1007/s10854-010-0230-8

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10854-010-0230-8

Keywords

Search

Navigation