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Capacitance–voltage characteristics of Pt/Bi2VO5.5/p-Si structures

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Abstract

Ferroelectric Bi2VO5.5 thin films were fabricated on p-type (100) Si substrates by sol–gel method and then annealed at different temperatures. The microstructures and surface morphologies of the Bi2VO5.5 thin films were examined by X-ray diffraction and atomic force microscope, respectively. The results indicate that the Bi2VO5.5 thin films show high c-axis preferred orientation and are compatible well with p-type Si substrates. The capacitance–voltage characteristics of Pt/Bi2VO5.5/Si capacitors measured at 1 MHz shows a clockwise hysteresis loop. The memory window of the hysteresis loop is 0.42 V with the gate voltage from −4 to 4 V. It is found that the memory window may be determined by the competition between ferroelectric polarization and charge injection.

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Acknowledgments

This work was supported by the National Natural Science Foundation of China (No. 60990312), the State Key Basic Research Program of China (2007CB924902), Shanghai Leading Academic Discipline Project (B411) and Science and Technology Commission of Shanghai Municipality (10JC1404600).

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Correspondence to Pingxiong Yang.

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Zhang, Z., Deng, H. & Yang, P. Capacitance–voltage characteristics of Pt/Bi2VO5.5/p-Si structures. J Mater Sci: Mater Electron 22, 488–491 (2011). https://doi.org/10.1007/s10854-010-0165-0

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  • DOI: https://doi.org/10.1007/s10854-010-0165-0

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