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Lot cycle time prediction in a ramping-up semiconductor manufacturing factory with a SOM–FBPN-ensemble approach with multiple buckets and partial normalization

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Abstract

“Ramp-up” is the process of increasing the production rate of a semiconductor manufacturing factory from the first lot to whole volume. Lot cycle time estimation and control during production ramp-up in a semiconductor factory is even more important. However, in addition to the large fluctuation, there are also trends and jumps (sudden increases) in the lot cycle time, which makes it a very challenging task. A SOM–FBPN-ensemble approach with multiple buckets and partial normalization is therefore proposed in this study for lot cycle time prediction in a ramping-up semiconductor manufacturing factory, which was seldom investigated in the past studies. The proposed methodology is composed of two parts. In the first part, the multiple-bucket approach is applied to consider the ramp-up plan of the semiconductor manufacturing factory. Subsequently, the SOM–FBPN-ensemble approach is applied to predict the cycle time of every lot in the ramping-up semiconductor manufacturing factory. The buckets obtained in the first part become additional inputs to the SOM–FBPN, and every parameter is normalized into a range narrower than [0, 1] to reflect the difference between the future and the past. To evaluate the effectiveness of the proposed methodology, a production simulation model was employed in this study. According to experimental results, the prediction accuracy of the proposed methodology was significantly better than those of many existing approaches.

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Correspondence to Toly Chen.

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Chen, T., Wang, YC. & Tsai, HR. Lot cycle time prediction in a ramping-up semiconductor manufacturing factory with a SOM–FBPN-ensemble approach with multiple buckets and partial normalization. Int J Adv Manuf Technol 42, 1206–1216 (2009). https://doi.org/10.1007/s00170-008-1665-4

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  • DOI: https://doi.org/10.1007/s00170-008-1665-4

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