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Distributed Test Pattern Generation for Stuck-At Faults in Sequential Circuits

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Abstract

Automatic test pattern generation (ATPG) remains one of themost complex CAD tasks. Therefore, numerous methods were proposed tospeed up ATPG by using parallelism. In this paper, we focus onparallelizing ATPG for stuck-at faults in sequential circuits bycombining fault and search space parallelism. Fault parallelism isapplied to so-called easy-to-detect faults. The main task of thisapproach is to find a best-suited partitioning of the fault list,based on dependencies between faults. For hard-to-detect faultsleft by fault parallelism, search space partitioning is applied,integrating depth-first and breadth-first search. Since a smalltest set size is mandatory for a cheap test and fault parallelismincreases the number of test patterns, test set compaction is donein a post-processing phase. Results show that our approach is notonly capable of achieving potentially superlinear speedups, but alsoimproves test set quality. The parallel environment we use consistsof a network of 100 workstations connected via ethernet.

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Authors and Affiliations

  1. Daimler-Benz Aerospace, Dornier Satellitensysteme, P.O. Box 801169, 81663, Munich, Germany

    Peter A. Krauss

  2. Institute of Electronic Design Automation, Dep. of ECE, Technical University of Munich, 80290, Munich, Germany

    Andreas Ganz & Kurt J. Antreich

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  1. Peter A. Krauss
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  2. Andreas Ganz
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Krauss, P.A., Ganz, A. & Antreich, K.J. Distributed Test Pattern Generation for Stuck-At Faults in Sequential Circuits. Journal of Electronic Testing 11, 227–245 (1997). https://doi.org/10.1023/A:1008266422380

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