Abstract
The antipodes of the class of sequential computers, executing tasks with a single CPU, are the parallel computers containing large numbers of computing nodes. In the shared-memory category, each node has direct access through a switching network to a memory bank, that can be composed of a single but large or multiple but medium sized memory configurations. Opposite to the first category are the distributed memory systems, where each node is given direct access to its own local memory section. Running a program in especially the latter category requires a mechanism that gives access to multiple address spaces, that is, one for each local memory. Transfer of data can only be done from one address space to another. Along with the two categories are the physically distributed, shared-memory systems, that allow the nodes to explore a single globally shared address space. All categories, the performances of which are subject to the way the computing nodes are linked, need either a direct or a switched interconnection network for inter-node communication purposes. Linking nodes and not taking into account the prerequisite of scalability in case of exploiting large numbers of them is not realistic, especially when the applied connection scheme must provide for fast and flexible communications at a reasonable cost. Different network topologies, varying from a single shared bus to a more complex elaboration of a fully connected scheme, and with them the corresponding intricate switching protocols have been extensively explored. A different vision is introduced concerning future prospects of an optically coupled distributed, shared-memory organized multiple-instruction, multiple-data system. In each cluster, an electrical crossbar looks after the interconnections between the nodes, the various memory modules and external I/O channels. The clusters itself are optically coupled through a free space oriented data distributing system. Analogies found in the design of the Convex SPP1000 substantiate the closeness to reality of such an architecture. Subsequently to the preceding introduction also an idealized picture of the fundamental properties of an optically based, fully connected, distributed, (virtual) shared-memory architecture is outlined.
Similar content being viewed by others
References
G. Bell. Scalable, parallel computers: alternatives, issues, and challenges. International Journal of Parallel Programming, 22 (Feb):3–44, 1994.
D. R. Cheriton, H. A. Goosen, and P. D. Boyle. Paradigm: a highly scalable shared-memory multicomputer architecture. Computer 24 (Feb):33–45, 1991.
Convex Computer Corporation. SPP1000 Systems Overview, 15, 1994.
L. Dekker. Applicability of hybrid simulation. AICA-Journal, 4:233–243, 1975.
R. Duncan. A survey of parallel computer architectures. Computer23(2):5–15, 1990.
R. J. Ernst. Optical interconnects in massively parallel processing systems: an interdisciplinary study based on both technological and business-economic insights. Master thesis, Section Computational Physics of the Faculty of Applied Physics of the Delft University of Technology, 1995.
E. E. E. Frietman and W. van Nifterick. Optical links in the Delft Parallel Processor. Preliminary research by the Delft University of Technology and ENKA/AKZO Business Group, Progress report, Delft, 1986.
E. E. E. Frietman, L. Dekker, E. H. Nordholt, and D. Chr. van Maaren. Optical interconnects facilitate the way to massive parallelism. In SPIE's Proceedings, Fiber Optic Datacom and Computer Networks, vol. 991, pp. 152–161, Boston, Mass., 1988.
E. E. E. Frietman. Opto-Electronic Processing and Networking: A Design Study. Perspectives of Optical Interconnects in Massively Parallel Processing. Research monograph, Delft University of Technology Press, 1995.
E. E. E. Frietman. CMOS opto-electronic logic elements. Journal of Microelectronic Systems Integration, 4(2):171–201, 1996.
M. J. Goodwin. Optical interconnect technologies for high performance electronic processor systems. GEC Journal of Research, 10(2):85–90, 1993.
Th. J. M. Jongeling, E. E. E. Frietman, K. Moddemeyer, and L. Dekker. Kaleidoscopic optical backplane for parallel processing. In SPIE's Proceedings, Fiber Optic Datacom and Computer Networks, vol. 991, pp. 22–27, Boston, Mass., 1988.
M. J. Murdocca, and V. Gupta. Architectural implications of reconfigurable optical interconnects. Journal of Parallel and Distributed Computing, 17(3):200–211, 1993.
J. H. Reif and A. Yoshida. Free space optical message routing for high performance parallel computers. In IEEE's Proceedings of the First International Workshop on Massively Parallel Processing Using Optical Interconnections, pp. 37–43, IEEE Computer Society Press, Los Alamitos, 1994.
A. B. Ruighaver and R. Holt. Performance of 4-dimensional PANDORA networks. In Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, pp. 81–88, December 1994.
T. Szymanski and H. S. Hinton. Design of a terabit free-space photonic backplane for parallel computing. In IEEE's Proceedings of the Second International Conference on Massively Parallel Processing Using Optical Interconnections, pp. 16–27, IEEE Computer Society Press, Los Alamitos, 1995.
Author information
Authors and Affiliations
Rights and permissions
About this article
Cite this article
Frietman, E.E.E., Ernst, R.J., Crosbie, R. et al. Prospects for Optical Interconnects in Distributed, Shared-Memory Organized MIMD Architectures. The Journal of Supercomputing 14, 107–128 (1999). https://doi.org/10.1023/A:1008103424339
Issue Date:
DOI: https://doi.org/10.1023/A:1008103424339