# Designing majority gate-based nanoscale two-dimensional two-dot one-electron parity generator and checker for nano-communication

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## Abstract

At the present time, logic circuits design prototypes with quantum-dot cellular automata (QCA) have been comprehensively researched. The confines of orthodox CMOS technology induce to the breakthroughs of different technologies, one of which is QCA. Thoughtlessly, because of the deficiency of advance assembly support, QCA circuits frequently agonize from several sorts of manufacture shortcomings and variations and, hence, are error prone and defective. QCA technology is forming its aspect due to extreme effectiveness and rapidity with lesser area requirement. This study, a novel architecture of parity generator and checker, is proposed based on two-dot one-electron cells. Parity generator and checker assist in impeccable binary information communication from point to point. With the outlined parity generator and checker circuit, a nano-communication architecture is designed. The designed architecture is rationalized with a competently established standard mathematical operation based on Coulomb’s theory. All the outlined design contains a minimum number of cells, extent, and energy compared to existing four-dot two-electron QCA designs. The outlined designs comprehend minimum majority gate and latency. Besides, power depletion by the designs is measured and it is perceived that the total energy and power required to operate these designs are incredibly low.

## Keywords

Quantum-dot cellular automata Parity generator Parity checker Nano-communication Power depletion## Introduction

By reason of its excessive speed and cohesive layout potential, the CMOS archetype may perhaps control the digital realm for the previous eras. However, according to contemporary analyses specified in [1], the typical CMOS archetype is about to agonize from several scaling deficits in the proximate future. A few eminent scaling confines of CMOS archetype assimilate dimensional constraint, reducing switching frequency, off-status leakage current, etc. The impulse for extreme-functioning digital outlines in nanoscale is assumed to be the prime encounter with CMOS archetype. Therefore, an obligation of reasonable, competent nanostructure as QCA arises into play being a substitute of CMOS archetype which is adept of extreme thickness, noticeable speed in nanoscale outlines with minimal power depletion. Several prevailing alternatives of QCA are, for instance, molecular [2] and magnetic quantum cellular automata [3], 4-dot 2-electron QCA [4, 5, 6, 7] and 2-dot 1-electron QCA [8]. This study emphasizes on the metal dot offset part of QCA. The 4-dot 2-electron version of QCA is utterly studied. A number of studies have been done in this area till now for instance [9, 10, 11, 12, 13, 14, 15]. The 2-dot 1-electron QCA can decode the binary data with electron formation inside the cell. Data can be conducted from one cell to another with cell-to-cell interface. Some of the earlier studies on 2-dot 1-electron QCA is organized in [8, 16]. Like 4-dot 2-electron QCA architecture, the essential paradigms of 2-dot 1-electron are majority gate, planar wire crossing wires and inverter that are classified in [8]. The two-dimensional 4-dot 2-electron cell is a square structure. Where, four “dots” at the four positions contain two electrons which can relocate between neighboring dots of the identical cell and acquire the transversely reverse positions owing to Coulomb’s repulsion [17]. In 2-dot 1-electron QCA, overall dots and electrons quantity per cell are nearly lessened by half. Besides, the four formations out of ^{4}*C*_{2} that are obscure are eradicated [8]. Furthermore, the wiring technique is less intricate, and the data in the binary form are delivered from a cell to the next cell by following the Coulomb’s principle. The material comprehension of QCA in inclusive could be realized at cryogenic temperature assortment as of now [18]. In this study, a novel outline of parity generator and parity checker is presented, and based on this outline, a nano-communication architecture is formed. All these designs dissipate very low power. In Section “Briefing to 2-dot 1-electron QCA”, an outline of 2-dot 1-electron QCA is presented. In Section “Proposed parity generator and checker for nano-communication”, the formations of proposed parity generator, parity checker and nano-communication architecture are organized. Depleted power assessment of 2-dot 1-electron architecture is reviewed in Section “Derivation of electron’s inner energy with depleted power analysis”. In Section “Analysis of the outlined design”, the outlined design has been studied. Later, energy and power supplies by the designs are presented in Section “Energy and power utilization for the proposed design” and finally, in Section “Conclusion”, the conclusion is thru.

## Briefing to 2-dot 1-electron QCA

The outline of the cells is oblong in 2-dot 1-electron QCA, besides two dots at the two edges and single electron allowed to shift between the quantum dots of the uniform cell.

In typical CMOS designs, clocking operates the principle of synchronization. But for QCA design, clocking operates to justify two essential requirements. QCA clocking is operated to manage the data stream direction and to empower drained signals. So, the clocking process of QCA is totally separate from traditional clocking process of CMOS. The clocking mechanism of QCA 2-dot 1-electron keeps on the related approach of 4-dot 2-electron QCA. The entire clocking mechanism is a pseudo-adiabatic procedure. QCA composition involves four basic clock segments. Each segment of QCA comprises four levels, explicitly, switch, hold, release, and relax.

The switching phase is known as raising phase. In this segment, the signal scale is amplified, and the electrons become empowered and lead to de-localize. The hold segment is typically the top phase. In this part, the signal scale is of the utmost use and the electrons attain their highest latent energy. Hence, QCA cells fully drop their polarity. In this stage, the cells are specified to achieve void phase.

*π*/2 out of phase with the succeeding clock segment as exhibited in Fig. 3. There subsist some distinct clocking mechanisms in QCA that are described earlier for separate QCA systems, for instance, magnetic [3] and molecular QCA [19]. The typical color code of separate phases is presented in Fig. 3.

## Proposed parity generator and checker for nano-communication

Once information is passed on from the broadcasting to the receiving point, a defect may arise. Parity perceives such defects. It is affixed to the data to be transmitted so that the figure of 1s turns into either even or odd. The even one is called even parity and odd one as odd parity. On the receiving point, the information along with the parity bit is verified; if the parity does not resemble the one referred, then a defect is spotted. The parity generator produces the parity at the broadcast point, though the checker tests out the parity at the receiving point.

Truth table of the parity generator

Binary input | Parity bit | |||
---|---|---|---|---|

A | B | C | Odd | Even |

0 | 0 | 0 | 1 | 0 |

0 | 0 | 1 | 0 | 1 |

0 | 1 | 0 | 0 | 1 |

0 | 1 | 1 | 1 | 0 |

1 | 0 | 0 | 0 | 1 |

1 | 0 | 1 | 1 | 0 |

1 | 1 | 0 | 1 | 0 |

1 | 1 | 1 | 0 | 1 |

Truth table of the parity checker

Binary input | Parity bit | ||||
---|---|---|---|---|---|

A | B | C | D | Odd | Even |

0 | 0 | 0 | 0 | 1 | 0 |

0 | 0 | 0 | 1 | 0 | 1 |

0 | 0 | 1 | 0 | 0 | 1 |

0 | 0 | 1 | 1 | 1 | 0 |

0 | 1 | 0 | 0 | 0 | 1 |

0 | 1 | 0 | 1 | 1 | 0 |

0 | 1 | 1 | 0 | 1 | 0 |

0 | 1 | 1 | 1 | 0 | 1 |

1 | 0 | 0 | 0 | 1 | 0 |

1 | 0 | 0 | 1 | 0 | 1 |

1 | 0 | 1 | 0 | 0 | 1 |

1 | 0 | 1 | 1 | 1 | 0 |

1 | 1 | 0 | 0 | 0 | 1 |

1 | 1 | 0 | 1 | 1 | 0 |

1 | 1 | 1 | 0 | 1 | 0 |

1 | 1 | 1 | 1 | 0 | 1 |

On the broadcast site, the parity generator uses the data as a key or input and produces the parity bit. The data and the produced parity bit are afterward referred through the transmission medium to their endpoint, where they are shifted within the parity checker. On the receiver end, the parity checker verifies the parity bit which was filled out inside the data for fault recognition.

Truth table for proposed nano-communication design

Parity generator | Parity checker | |||||||
---|---|---|---|---|---|---|---|---|

Binary input | Parity bit | A | B | C | Parity bit | Checker bit | ||

A | B | C | ||||||

0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |

0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 |

0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |

0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 |

1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |

1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |

1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 |

1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 |

## Derivation of electron’s inner energy with depleted power analysis

*ψ*(

*u*) is the quantity of particles flowing along u direction,

*φ*(

*k*) is the amplitude of the wave quantity, \(k = \frac{2\pi }{\lambda }\) is the transmission frequency of an electron,

*λ*is the wave dimension. Wave quantity can be presented through Eq. 2.

*x*= 0, then electron in a 2-dot cell confined at any of the two conceivable dots. From Eq. 1, it is perceived that the charge of

*ψ*(

*u*) is in proportion to

*φ*(

*k*) multiplied by several charges of

*e*

^{iku}. Therefore,

*ψ*(

*u*) matches the routine of a cosine wave consenting its negative value at \(\frac{x}{2}\). Furthermore, this precise routine can be recognized in case of

*φ*(

*k*). This parameter is termed as a probabilistic interpretation of Born [21]. In the quantum approach, the maximum regular practice is to appraise the energy as the volume of the system latent energy and the dynamic energy. Hence, the total energy is indicated here by \({\vec{\hat{P}}}\) and reported in Eq. 3.

*m*and

*n*, apiece of which holds charge e. Hence, \(\hat C(\vec r)\)[22] can be attained in Eq. 7.

The energy of the outline achieved from Eq. 11 marks the electrons of the cells to change throughout the channels of the specific cells.

_{s}and E

_{p}be immediate signal energy and distinctive power energy because of feedback signal

*x*

_{i}(

*t*), where power assessments are arranged over the intermission |

*t*| <

*T*, where T is partial of the time gap. Then, the immediate signal energy

*E*

_{s}[22] can be indicated with Eq. 12

*E*

_{p}[22] can be projected with Eq. 13

*E*

_{en1}and

*E*

_{en2}are the power and signal energy, consistently, offered from the circumstances to the 2-dot 1-electron QCA outline,

*n*is the figure of response lines into the circuit. This power and energy ought to increase all through the architecture and this is attained over the connection effect of 2-dot 1-electron QCA. In 2-dot 1-electron QCA, the two dots, specifically the wells, are linked by channel with a capacitor at its focus. It has an outward area A, a space between two plates is

*d*and voltage

*V*. Thus, the capacitance is

*C*≈ ϵ

*A*/

*d*, where ϵ denotes the permittivity of free area. The electric base in the gap has potency

*E*=

*V*/

*d*. Thus, the impediment energy in the electric base [22] is presented below in Eq. 16

*γ*is the channeling energy. This energy

*γ*is termed as barrier latent energy. An electron can move between two separate energy points if the quantity of the two quantum figures of the particular energy points is an odd number. Tunneling is not permitted if both the quantum figures are not odd numbers [22]. Therefore, minimal energy provided by a clock wave to a 2-dot 1-electron outline through N cells [22] is specified by Eq. 17,

*N*cells is shown in Eq. 19,

*υ*is the instance frequency of energy, n

_{min}is the total number of quantum to attain the least energy to override barrier. In Eq. 20, the power utilization in a 2-dot 1-electron QCA [22] is organized

*x*

_{u}(

*t*) is the functional signal amplitude. In a while, once an electron moves from upper energy to ground energy level, it depletes particular expanse of energy. The complete energy depleted by a structure [22] including

*N*many 2-dot 1-electron cells will be organized in Eq. 21

*υ*is the depleted frequency of energy. To process the collective depleted power from an architecture of 2-dot 1-electron cell, the depleted power for each one of the cells must be assessed. The depleted power of a 2-dot 1-electron QCA is through

*x*

_{d}(

*t*) being the depleted signal amplitude [22]. Equation 22 presents the depleted power of 2-dot 1-electron QCA through

*x*

_{d}(

*t*).

*N*such cells is presented in Eq. 23

*E*

_{b}≤

*N*

_{Ec}. The reflection measurement [22] can be stated as follows through Eq. 24

*d*is the space between the capacitor slots and

*β*is a constant. From Eq. 24, it can be realized that

*T*≠ 0. Hence, permanently there is a possibility of interaction which rests on

*E*

_{c}and

*d*. Thus, it can be obtained from Eq. 24 [22] and presented in Eq. 25

Now, it is obvious that the stand of QCA rests on the Columbic impact between electrons. A cell includes electrons with quantum dots. The situation of electron defines the status of the cell. The influence of the adjacent cells on a cell modifies the polarity of the cell. The energy also inflicts some influence on cell polarity. A weak feedback is not sufficient to polarize a cell and so the volume of energy deficit is to be provided outwardly. This energy assists the electrons to override the latent energy *γ* of the channel and achieve the polarity. A point is to reduce the power and energy utilization along with lessening wastage. Incidentally, a significant issue which shows a vital function is the switching rate. If the switching rate is amplified, then further energy will be essential for concise length of time. Thus, the electrode voltage needs to be static at a point. So that the switching rate becomes stable and dissipates lower energy. So, for the effective functioning of 2-dot 2-dot 1-electron architecture, the depleted energy must be minimal and the switching period must be lesser.

## Analysis of the outlined design

*d*

_{0}be the space between the instant charges

*q*

_{1}and

*q*

_{2}. Afterwards, between them, the conceivable energy [17] is as follows in Eq. 26

*E*

_{c}is the number of conceivable energies of the adjoining electrons and

*k*is Coulomb’s constant. From Eq. 26, Eq. 27 can be presented as follows

Output position of 2-dot 1-electron parity generator

Cell | Explanations |
---|---|

1, 2, 3 | Input cell |

4 | Output polarity is achieved |

5 | Polarity of cell 4 is achieved |

6 | Output polarity is achieved |

Output position of 2-dot 1-electron parity checker

Cell | Explanations |
---|---|

1, 2, 3, 4 | Input cell |

5 | Output polarity is achieved |

6 | Polarity of cell 5 is achieved |

7 | Output polarity is achieved |

8 | Polarity of cell 7 is achieved |

9 | Output polarity is achieved |

Output position of 2-dot 1-electron nano-communication architecture

Cell | Explanations |
---|---|

1, 2, 3 | Input cell |

4 | Output polarity is achieved |

5 | Polarity of cell 4 is achieved |

6 | Output polarity is achieved |

7, 8 | Transmission medium cell |

9 | Garbage cell |

10, 11, 12, 13 | Polarity of input cell is achieved |

14 | Output polarity is achieved |

15 | Polarity of cell 14 is achieved |

16 | Output polarity is achieved |

17 | Polarity of cell 16 is achieved |

18 | Output polarity is achieved |

A design is even when all the responses to a majority gate get into the access with identical force at the similar time and the output is gained in the similar or succeeding zone. The architectures in Figs. 4b, 5b and 6b assure both the circumstances. Therefore, constancies of the outlined architectures are confirmed. Let *x* be the extent and y be the breadth of a 2-dot 1-electron QCA correspondingly. For the parity generator, 51 cells are essential; and for parity checker, 77 cells are needed; and nano-communication architecture required 202 cells. The spaces enclosed essentially are 51 *xy* nm^{2}, 77 *xy* nm^{2}, and 202 *xy* nm^{2}, correspondingly. We can review that the quantity of cells required for the nano-communication architecture is 202, extent enclosed is 158,908 nm^{2}, the overall majority gate needed is 15 and clock phases required is 8.

## Energy and power utilization for the proposed design

*n*, the diminished constant of Plank’s is specified by \(\hbar\), size of the electron is

*m*, the area is a

^{2}, the overall quantity of cells in the layout is

*N*and clock segments consumed are

*k*. In the outline,

*n*= 10 and

*n*

_{2}= 3.

Values of different factors in 2-dot 1-electron QCA

Features | Concern | Parity generator | Parity checker | Nano. architecture |
---|---|---|---|---|

\({E_{\text{m}}} = \frac{{{n^2}{\pi^2}{\hbar^2}N}}{{m{a^2}}}\) | Provided energy to the layout | 1. 812 × 10 | 2.713 × 10 | 4.558 × 10 |

\({E_{\text{dep}}} = \frac{{{\pi^2}{\hbar^2}}}{{m{a^2}}}\left( {{n^2} - 1} \right)\,N\) | Energy depletion | 1.762 × 10 | 2.680 × 10 | 4.542 × 10 |

\({\nu_1} = \frac{{\pi {\hbar}}}{{m{a^2}}}\left( {{n^2} - {n_2}^2} \right)\,N\) | Incident frequency of energy | 4.812 × 10 | 7.082 × 10 | 1.198 × 10 |

\(\nu_{2} = \frac{\pi{\hbar}}{ma^{2}}\left( n^{2} - 1 \right)\,N\) | Incidence of depletion energy | 5.224 × 10 | 7.772 × 10 | 1.309 × 10 |

\({\nu_1} - {\nu_2} = \frac{\pi \hbar }{{m{a^2}}}\left( {{n_2}^2 - 1} \right)\,N\) | Variance frequency | 4.120 × 10 | 6.900 × 10 | 2.507 × 10 |

\({\tau_1} = \frac{1}{\nu_1} = \frac{{m{a^2}}}{{\pi \hbar \,\left( {{n^2} - {n_2}^2} \right)\,}}N\) | Time required to extend the quantum level | 2.078 × 10 | 1.412 × 10 | 8.347 × 10 |

\({\tau_2} = \frac{1}{\nu_2} = \frac{{m{a^2}}}{{\pi \hbar \,\left( {{n^2} - 1} \right)\,}}N\) | Dissipate time to arrive at lenient state | 1.914 × 10 | 1.287 × 10 | 7.639 × 10 |

\(\tau = {\tau_1} + {\tau_2}\) | Instant that cells in a clock extent needed to move to the successive polarization | 3.992 × 10 | 2.699 × 10 | 1.598 × 10 |

\({t_{\text{p}}} = \tau + \left( {k - 1} \right)\,{\tau_2}N\) | Time needed to proliferate thru the layout | 6.564 × 10 | 6.547 × 10 | 6.448 × 10 |

*x*= 13 nm and

*y*= 5 nm. From Table 8, it can express that the quantity of cells needed for the 2-dot 1-electron designs is considerably fewer than that in case of their 4-dot 2-electron complements, accordingly, the area consumption also becomes lower. Besides, the energy essential to force the designs is significantly less in case of 2-dot 1-electron designs as the figure of electrons occupied is uniform as the figure of cells; while in case of 4-dot 2-electron outlines as the figure of electrons occupied are just the twice of the figure of cells figure and from [24], the energy requisite is precisely relational to the number of cells concerned.

Reasonable analysis of nano-communication layout, parity generator and checker with two variations of QCA

Features | Outline | Cell number | Covered extent (µm | Entailed energy |
---|---|---|---|---|

Nano-communication architecture | Design in [12] | 275 | 0.410 | Reasonably higher due to 550 electrons |

Design in [25] | 419 | 0.624 | Reasonably higher due to 838 electrons | |

Design in [26] | 4026 | 13.810 | Reasonably higher due to 8052 electrons | |

Design in [27] | 4436 | 6.900 | Reasonably higher due to 8872 electrons | |

Design in [28] | Not known | 4.39 (approx.) | Not known | |

Design in [29] | 293 | 0.479 | Reasonably higher due to 586 electrons | |

Design in [30] | 382 | 1.020 | Reasonably higher due to 764 electrons | |

Design in [31] | 483 | 0.035 | Reasonably higher due to 966 electrons | |

Design in [32] | 679 | 0.035 | Reasonably higher due to 1358 electrons | |

Design in [33] | 744 | 0.889 | Reasonably higher due to 1488 electrons | |

Proposed | 202 | 0.158 | Reasonably lower due to 202 electrons | |

Parity generator | Design in [29] | 72 | 0.078 | Reasonably higher due to 144 electrons |

Design in [34] | 60 | 0.052 | Reasonably higher due to 120 electrons | |

Design in [35] | 99 | 0.170 | Reasonably higher due to 198 electrons | |

Design in [36] | 64 | 0.090 | Reasonably higher due to 128 electrons | |

Design in [37] | 87 | 0.100 | Reasonably higher due to 174 electrons | |

Design in [38] | 104 | 0.140 | Reasonably higher due to 208 electrons | |

Design in [39] | 53 | 0.075 | Reasonably higher due to 106 electrons | |

Design in [42] | 159 | 0.260 | Reasonably higher due to 318 electrons | |

Proposed | 51 | 0.020 | Reasonably lower due to 51 electrons | |

Parity checker | Design in [29] | 130 | 0.143 | Reasonably higher due to 260 electrons |

Design in [34] | 117 | 0.136 | Reasonably higher due to 234 electrons | |

Design in [35] | 145 | 0.280 | Reasonably higher due to 290 electrons | |

Design in [36] | 94 | 0.110 | Reasonably higher due to 198 electrons | |

Design in [38] | 214 | 0.436 | Reasonably higher due to 428 electrons | |

Design in [40] | 299 | 0.530 | Reasonably higher due to 598 electrons | |

Design in [41] | 84 | 0.080 | Reasonably higher due to 168 electrons | |

Design in [42] | 136 | 0.250 | Reasonably higher due to 272 electrons | |

Proposed | 77 | 0.035 | Reasonably lower due to 77 electrons |

Power depletion comparison by the proposed and existing designs

Design | Outline | Overall energy depletion (meV) |
---|---|---|

Nano-communication architecture | Design in [12] | 778.60 |

Design in [25] | 567.80 | |

Design in [26] | Not known | |

Design in [27] | 2092.84 | |

Design in [28] | 1348.80 | |

Design in [29] | 781.00 | |

Design in [30] | 687.80 | |

Design in [31] | 722.00 | |

Design in [32] | 1302.60 | |

Design in [33] | 898.80 | |

Proposed | 2.84 × 10 | |

Parity generator | Design in [29] | 329.80 |

Design in [34] | 239.20 | |

Design in [35] | 237.20 | |

Design in [36] | 241.20 | |

Design in [37] | 359.78 | |

Design in [38] | 0.56994 | |

Design in [39] | 389.40 | |

Design in [42] | 931.40 | |

Proposed | 10.99 × 10 | |

Parity checker | Design in [29] | 479.60 |

Design in [34] | 419.20 | |

Design in [35] | 479.20 | |

Design in [36] | 358.80 | |

Design in [38] | 1.11543 | |

Design in [40] | 690.87 | |

Design in [41] | 210.20 | |

Design in [42] | 961.60 | |

Proposed | 16.72 × 10 |

## Conclusion

The architecture of parity generator and checker is organized in this study and based on these layouts, a nano-communication transmission channel is proposed using 2-dot 1-electron QCA. Because of the unavailability of a 2-dot 1-electron QCA simulator, potential energy resolution technique based on Coulomb’s revulsion theory has been applied to determine the outputs. The outlined layouts are studied properly and then the overall essential energy depletion is analyzed. It is presented that the proposed design dissipates very low energy. From the layouts, it is coherent that the 2-dot 1-electron QCA parity generator, checker and nano-communication architecture are considerably more proficient regarding size and power depletion than the identical with 4-dot 2-electron QCA.

## Notes

### Compliance with ethical standards

### Conflict of interest

The authors declare that they have no conflict of interest.

## References

- 1.Wilson, L.: International technology roadmap for semiconductors (ITRS). Semicond. Ind. Assoc.
**1**, (2013). http://www.itrs.net - 2.Lent, C.S., Isaksen, B., Lieberman, M.: Molecular quantum-dot cellular automata. J. Am. Chem. Soc.
**125**(4), 1056–1063 (2003)CrossRefGoogle Scholar - 3.Imre, A., Csaba, G., Ji, L., Orlov, A., Bernstein, G.H., Porod, W.: Majority logic gate for magnetic quantum-dot cellular automata. Science
**311**(5758), 205–208 (2006)CrossRefGoogle Scholar - 4.Bahar, A.N., Uddin, M.S., Abdullah-Al-Shafi, M., Bhuiyan, M.M.R., Ahmed, K.: Designing efficient QCA even parity generator circuits with power dissipation analysis. Alex. Eng. J.
**57**(4), 2475–2484 (2018)CrossRefGoogle Scholar - 5.Abdullah-Al-Shafi, M., Bahar, A.N., Habib, M.A., Bhuiyan, M.M.R., Ahmad, F., Ahmad, P.Z., Ahmed, K.: Designing single layer counter in quantum-dot cellular automata with energy dissipation analysis. Ain Shams Eng. J.
**9**(4), 2641–2648 (2017).**(2018)**CrossRefGoogle Scholar - 6.Abdullah-Al-Shafi, M., Bahar, A.N.: A new approach of presenting binary to grey and grey to binary code converter in majority voter-based QCA nanocomputing. J. Comput. Theor. Nanosci.
**14**(5), 2416–2421 (2017)CrossRefGoogle Scholar - 7.Abdullah-Al-Shafi, M., Bahar, A.N.: Energy optimized and low complexity 2-dimensional 4 Dot 2 electron flip-flop and quasi code generator in nanoscale. J. Nanoelectron. Optoelectron.
**13**(6), 856–863 (2018)CrossRefGoogle Scholar - 8.Hook IV, L.R., Lee, S.C.: Design and simulation of 2-D 2-dot quantum-dot cellular automata logic. IEEE Trans. Nanotechnol.
**10**(5), 996–1003 (2011)CrossRefGoogle Scholar - 9.Timler, J., Lent, C.S.: Power gain and dissipation in quantum-dot cellular automata. J. Appl. Phys.
**91**(2), 823–831 (2002)CrossRefGoogle Scholar - 10.Berzon, D., Fountain, T.J.: A memory design in QCAs using the SQUARES formalism. In: Proceedings Ninth Great Lakes Symposium on VLSI, pp. 166–169. IEEE (1999)Google Scholar
- 11.Abdullah-Al-Shafi, M., Bahar, A.N.: Ultra-efficient design of robust RS flip-flop in nanoscale with energy dissipation study. Cogent Eng.
**4**(1), 1391060 (2017)Google Scholar - 12.Abdullah-Al-Shafi, M., Bahar, A.N., Ahmad, F., Ahmed, K.: Performance evaluation of efficient combinational logic design using nanomaterial electronics. Cogent Eng.
**4**(1), 1349539 (2017)Google Scholar - 13.Abdullah-Al-Shafi, M., Bahar, A.N., Ahmad, P.Z., Ahmad, F., Bhuiyan, M.M.R., Ahmed, K.: Power analysis dataset for QCA based multiplexer circuits. Data Brief
**11**, 593–596 (2017)CrossRefGoogle Scholar - 14.Abdullah-Al-Shafi, M., Bahar, A.N.: Optimized design and performance analysis of novel comparator and full adder in nanoscale. Cogent En.
**3**(1), 1237864 (2016)Google Scholar - 15.Abdullah-Al-Shafi, M., Bahar, A.N.: QCA: an effective approach to implement logic circuit in nanoscale. In: 2016 5th International Conference on Informatics, Electronics and Vision (ICIEV), pp. 620–624. IEEE (2016)Google Scholar
- 16.Hook I.V.L.R., Lee, S.C.: Collinear 2-dot QCA nano-electronic wire structure to improve QCA computing device reliability. In: Proceedings SPIE smart structure conference (Vol. 1) (2011)Google Scholar
- 17.Mukhopadhyay, D., Dutta, P.: Quantum cellular automata based novel unit 2: 1 multiplexer. Int. J. Comput. Appl.
**43**(2), 22–25 (2012)Google Scholar - 18.Likharev, K.K.: Single-electron devices and their applications. Proc. IEEE
**87**(4), 606–632 (1999)CrossRefGoogle Scholar - 19.Lent, C.S., Isaksen, B.: Clocked molecular quantum-dot cellular automata. IEEE Trans. Electron Devices
**50**(9), 1890–1896 (2003)CrossRefGoogle Scholar - 20.Blum, K.: Density Matrix Theory and Applications, vol. 64. Springer Science & Business Media, Berlin (2012)CrossRefGoogle Scholar
- 21.Born, M.: Statistical interpretation of quantum mechanics. Science
**122**(3172), 675–679 (1955)CrossRefGoogle Scholar - 22.Zettili, N.: Quantum mechanics: concepts and applications. Am. J. Phys.
**71**, 93 (2003). https://doi.org/10.1119/1.1522702 CrossRefGoogle Scholar - 23.Lent, C.S., Tougaw, P.D.: A device architecture for computing with quantum dots. Proc. IEEE
**85**(4), 541–557 (1997)CrossRefGoogle Scholar - 24.Mukhopadhyay, D., Dutta, P.: A study on energy optimized 4 dot 2 electron two dimensional quantum dot cellular automata logical reversible flip-flops. Microelectron. J.
**46**(6), 519–530 (2015)CrossRefGoogle Scholar - 25.Das, S., De, D.: Nanocommunication using QCA: a data path selector cum router for efficient channel utilization. In: 2012 International Conference on Radar, Communication and Computing (ICRCC), pp. 43–47. IEEE (2012)Google Scholar
- 26.Sardinha, L.H., Costa, A.M., Neto, O.P.V., Vieira, L.F., Vieira, M.A.: Nanorouter: a quantum-dot cellular automata design. IEEE J. Sel. Areas Commun.
**31**(12), 825–834 (2013)CrossRefGoogle Scholar - 27.Yao, F., Zein-Sabatto, M.S., Shao, G., Bodruzzaman, M., Malkani, M.: Nanosensor data processor in quantum-dot cellular automata. J. Nanotechnol.
**2014**, 1–14 (2014)CrossRefGoogle Scholar - 28.Silva, D.S., Sardinha, L.H., Vieira, M.A., Vieira, L.F., Neto, O.P.V.: Robust serial nanocommunication with QCA. IEEE Trans. Nanotechnol.
**14**(3), 464–472 (2015)CrossRefGoogle Scholar - 29.Das, J.C., De, D.: Quantum-dot cellular automata based reversible low power parity generator and parity checker design for nanocommunication. Front. Inf. Technol. Electron. Eng.
**17**(3), 224–236 (2016)CrossRefGoogle Scholar - 30.Das, J.C., De, D.: Circuit switching with quantum-dot cellular automata. Nano Commun. Netw.
**14**, 16–28 (2017)CrossRefGoogle Scholar - 31.Debnath, B., Das, J.C., De, D.: Reversible logic-based image steganography using quantum dot cellular automata for secure nanocommunication. IET Circ. Dev. Syst.
**11**(1), 58–67 (2017)CrossRefGoogle Scholar - 32.Das, J.C., De, D.: Nanocommunication network design using QCA reversible crossbar switch. Nano Commun. Netw.
**13**, 20–33 (2017)CrossRefGoogle Scholar - 33.Debnath, B., Das, J.C., De, D.: Design of image steganographic architecture using quantum-dot cellular automata for secure nanocommunication networks. Nano Commun. Netw.
**15**, 41–58 (2018)CrossRefGoogle Scholar - 34.Santra, S., Roy, U.: Design and optimization of parity generator and parity checker based on quantum-dot cellular automata. World Acad. Sci. Eng. Technol. Int. J. Comput. Electr. Autom. Control Inf. Eng.
**8**(3), 491–497 (2014)Google Scholar - 35.Mustafa, M., Beigh, M.R.: Design and implementation of quantum cellular automata based novel parity generator and checker circuits with minimum complexity and cell count. Indian J. Pure Appl. Phys.
**51**, 60–66 (2013)Google Scholar - 36.Ahmad, F., Ahmad, P.Z., din Bhat, G. M.: Design and analysis of odd-and even-parity generators and checkers using Quantum-dot Cellular Automata (QCA). In: 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom), pp. 187–194. IEEE (2015)Google Scholar
- 37.Singh, G., Sarin, R.K., Raj, B.: A novel robust exclusive-OR function implementation in QCA nanotechnology with energy dissipation analysis. J. Comput. Electron.
**15**(2), 455–465 (2016)CrossRefGoogle Scholar - 38.Agrawal, P., Sinha, S.R.P., Misra, N.K., Wairya, S.: Design of quantum dot cellular automata based parity generator and checker with minimum clocks and latency. Int. J. Mod. Educ. Comput. Sci.
**8**(8), 11 (2016)CrossRefGoogle Scholar - 39.Agarwal, M., et al.: Layered T parity generators using quantum-dot cellular automata. In: 2017 8th IEEE Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON) (pp. 324–327. IEEE (2017)Google Scholar
- 40.Teja, V.C., Polisetti, S., Kasavajjala, S.: QCA based multiplexing of 16 arithmetic & logical subsystems-a paradigm for nano computing. In: 2008 3rd IEEE International Conference on Nano/Micro Engineered and Molecular Systems, pp. 758–763. IEEE (2008)Google Scholar
- 41.Kumar, D., Kumar, C., Gautam, S., Mitra, D.: Design of practical parity generator and parity checker circuits in QCA. In: 2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), pp. 28–33. IEEE (2017)Google Scholar
- 42.Kassa, S.R., Nagaria, R.K., Karthik, R.: Energy efficient neoteric design of a 3-input majority gate with its implementation and physical proof in quantum dot cellular automata. Nano Commun. Netw.
**15**, 28–40 (2018)CrossRefGoogle Scholar - 43.Abdullah-Al-Shafi, M., Bahar, A.N.: An architecture of 2-dimensional 4-dot 2-electron QCA full adder and subtractor with energy dissipation study. Act. Passive Electron. Compon.
**2018**, 1–10 (2018)CrossRefGoogle Scholar - 44.Bahar, A.N., Laajimi, R., Abdullah-Al-Shafi, M., Ahmed, K.: Toward efficient design of flip-flops in quantum-dot cellular automata with power dissipation analysis. Int. J. Theor. Phys.
**57**(11), 3419–3428 (2018)CrossRefGoogle Scholar - 45.Bahar, A.N., Ahmad, F., Nahid, N.M., Hassan, M.K., Abdullah-Al-Shafi, M., Ahmed, K.: An optimal design of conservative efficient reversible parity logic circuits using QCA. Int. J. Inf. Technol. (2018). https://doi.org/10.1007/s41870-018-0226-9 CrossRefGoogle Scholar
- 46.Liu, W., Srivastava, S., Lu, L., O’Neill, M., Swartzlander, E.E.: Are QCA cryptographic circuits resistant to power analysis attack? IEEE Trans. Nanotechnol.
**11**(6), 1239–1251 (2012)CrossRefGoogle Scholar

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