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A Review of Engineering Techniques to Suppress Ambipolarity in Tunnel FET

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Abstract

Scaling of conventional MOSFET is hindered by the fact that the subthreshold swing cannot be reduced less than 60 mV/decade. Tunnel FET (TFET) is a promising candidate to replace conventional MOSFET due to its low subthreshold swing (SS), low OFF-state leakage and high ION/IOFF ratio. But TFET suffers from two problems, namely low ON current (ION) and ambipolarity. Due to the ambipolar behaviour, the TFET cannot be turned OFF completely for zero gate voltage which questions its applicability in complementary digital circuits. There are quite a number of techniques devised to reduce or eliminate the ambipolarity. This paper reviews the different device-engineering techniques to suppress the ambipolarity of TFET. The effect of the ambipolarity technique on the gate-drain capacitance and analog/RF performance is also discussed in this review.

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Acknowledgements

The first author (Pasupathy K. R.) gratefully acknowledges the post-doctoral fellowship offered by NIT Trichy. The second author (Manivannan T. S.) sincerely thanks the NIT Trichy for providing financial assistance through Research Assistantship.

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  1. NIT Trichy, Electronics and Communication Engineering, Tiruchirappalli, India

    Pasupathy K. R., Manivannan T. S. & Lakshminarayanan G.

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  3. Lakshminarayanan G.
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Pasupathy K. R. has collected, analysed and organized the information. Manivannan T. S. contributed towards analysis and simulation. Lakshminarayanan G. provided valuable insights and suggestions during manuscript preparation and revision. All authors read and approved the final manuscript.

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Correspondence to Pasupathy K. R..

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R., P.K., S., M.T. & G., L. A Review of Engineering Techniques to Suppress Ambipolarity in Tunnel FET. Silicon 14, 1887–1894 (2022). https://doi.org/10.1007/s12633-021-01018-2

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