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Compact Modeling and Analysis of Charge and Device Capacitance for SELBOX Junctionless Transistor

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Abstract

A charge based compact drain current and capacitance modeling has been developed to describe the transfer and Capacitance-Voltage characteristics of the proposed device. The inversion charge density of the proposed model is defined on the basis of the surface potential model equation at the source and the drain end. These inversion charges are evaluated by the Ward Dutton partition method using the current continuity principle and charge balance equations. Using these inversion charges, a drain current model is discussed for the proposed device, which is based on implicit unified charge control expression. This model defined all the possible intrinsic capacitances analytically derived by the terminal charges associated with the terminal voltages. This compact model is valid in the weak, moderate and strong regime of the device operation. The transfer characteristics of the drain current and C-V characteristic of capacitances have been validated using 2-D numerical simulation.

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Acknowledgments

The proposed manuscript has been assisted by co-author Dr. Sanjeev Rai, who provided valuable expertise and insight that greatly supported in analytical modelling as well as in paper writing.

We would also like to thank anonymous reviewers for their so-called insights for improving this manuscript.

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There is no data or material that has been copied from elsewhere in the proposed manuscript.

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The authors declare that no financial support has been taken either from institutions or by any private/corporate agencies for the work reported in the proposed manuscript.

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Authors and Affiliations

  1. Department of Electronics & Communication Engineering, Motilal Nehru National Institute of Technology, Allahabad, 211004, India

    Amrish Kumar & Sanjeev Rai

Authors
  1. Amrish Kumar
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  2. Sanjeev Rai
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The authors declare that the major contribution has been given from Mr. Amrish Kumar. However, rest of the authors have equal contribution in the paper.

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Correspondence to Amrish Kumar.

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Kumar, A., Rai, S. Compact Modeling and Analysis of Charge and Device Capacitance for SELBOX Junctionless Transistor. Silicon 14, 2565–2572 (2022). https://doi.org/10.1007/s12633-020-00922-3

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  • DOI: https://doi.org/10.1007/s12633-020-00922-3

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