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Analytical Drain Current Modeling and Simulation of Triple Material Gate-All-Around Heterojunction TFETs Considering Depletion Regions

  • PHYSICS OF SEMICONDUCTOR DEVICES
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Abstract

This paper deals with electrostatic behavior of triple-material gate-all-around hetero-junction tunneling field-effect transistors (TMGAA-HJTFET) device. The model is advantageous in apprehending a comparative study with the single-material gate-all-around hetero-junction tunneling field-effect transistors (SMGAA-HJTFET) in terms of surface potential, electric field, drain current, transconductance, and threshold voltage. The surface-potential distribution in partition regions along the channel is solved by using two-dimensional Poisson’s equation. By using the drift and diffusion current, drain current is derived, and IOn/IOff ratio of 1011 is gained from analytical modeling and TCAD simulation. Transconductance and threshold voltage are derived from the tunneling current. The proposed model results are validated by the ATLAS TCAD simulation tool.

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ACKNOWLEDGMENTS

This work was supported by Women Scientist Scheme-A, Department of Science and Technology, New Delhi, Government of India, under the Grant SR/WOS-A/ET-5/2017.

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  1. Department of Electronics and Communication, Dayananda Sagar College of Engineering, Bangalore, Karnataka, India

    C. Usha & P. Vimala

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  1. C. Usha
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  2. P. Vimala
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Usha, C., Vimala, P. Analytical Drain Current Modeling and Simulation of Triple Material Gate-All-Around Heterojunction TFETs Considering Depletion Regions. Semiconductors 54, 1634–1640 (2020). https://doi.org/10.1134/S1063782620120398

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  • DOI: https://doi.org/10.1134/S1063782620120398

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