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Heat transfer analysis on wafer annealing process in semiconductor multi-wafer furnace using CFD simulation

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Abstract

This study employs a three-dimensional numerical model to simulate a vertical furnace for wafer annealing process. For a conventional furnace design, it is revealed that the top 5 pieces of the stacked wafers are exposed to lower temperatures, approximately 3–5 % lower than the operating heater temperature. Temperature distribution and the heat losses from the furnace, especially on the heat dissipated through the top header and the process door of the furnace chamber, are examined. To reduce the heat losses, furnace design improvements comprised of a thicker top header and a better thermal insulated process door are recommended. With such implementations, up to 28 % and 22 % reduction of heat dissipation through the top header and the process door, respectively, could be attained. In addition, the design of the boat cover is found to influence the temperature uniformity across the stacked wafers. To attain better temperature uniformity at the top region of stacked wafers, a furnace with a full boat cover is thus recommended.

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Abbreviations

C P :

Specific heat capacity

h :

Heat transfer coefficient

k :

Thermal conductivity

p :

Pressure

q :

Heat flux

Re D :

Reynolds number

T :

Temperature

T w :

Wall temperature

T ∞ :

Temperature of surrounding

\(\vec V\) :

Velocity vector

ϵ :

Emissivity

μ :

Dynamic viscosity

ρ :

Density

σ :

Stefan-Boltzmann constant

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Acknowledgements

Acknowledgement to Ministry of Higher Education Malaysia for Fundamental Research Grant Scheme with Project Code: FRGS/1/2019/TK03/USM/03/3 for the financial support.

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Authors and Affiliations

  1. School of Mechanical Engineering, Engineering Campus, Universiti Sains Malaysia, Gelugor, Penang, 14300, Malaysia

    Siew Aun Tan, Kok Hwa Yu & Mohd Zulkifly Abdullah

Authors
  1. Siew Aun Tan
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  2. Kok Hwa Yu
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  3. Mohd Zulkifly Abdullah
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Corresponding authors

Correspondence to Kok Hwa Yu or Mohd Zulkifly Abdullah.

Additional information

Siew Aun Tan received his B.Eng. (Hons.) and M.Sc. degrees in Mechanical Engineering from Universiti Sains Malaysia in 2007 and 2018. He currently is a Furnace Engineer for wafer manufacturing industry. He has 10 years of working experience in furnace engineering for 6″ and 8″ wafer fab. His research interests are thermal, heat transfer and furnace engineering.

Kok Hwa Yu received his B.Eng. (Hons.) and M.Sc. degrees in Aerospace Engineering from Universiti Sains Malaysia in 2008 and 2011. He received his Ph.D. in Mechanical Engineering from National University of Singapore. He is currently a Lecturer in Universiti Sains Malaysia. His research interests include fluid dynamics, mixing flow, microfluidics and heat transfer.

Mohd Zulkifly Abdullah received the B.Eng. degree in Mechanical Engineering from the University of Wales, Swansea, United Kingdom in 1990, M.Sc. degree in Thermodynamics and Fluid Mechanics from the University of Strathclyde, Glasgow, United Kingdom, and the Ph.D. degree in fluid dynamics also from the University of Strathclyde. His current research interests include CFD, heat transfer, electronic packaging, surface mount technology, electronic cooling and combustion.

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Tan, S.A., Yu, K.H. & Abdullah, M.Z. Heat transfer analysis on wafer annealing process in semiconductor multi-wafer furnace using CFD simulation. J Mech Sci Technol 36, 3143–3151 (2022). https://doi.org/10.1007/s12206-022-0545-4

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  • DOI: https://doi.org/10.1007/s12206-022-0545-4

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