Ultra-wide Bandwidth Inter-Chip Interconnects for Heterogeneous Millimeter-Wave and THz Circuits
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Heterogeneous chip-to-chip interconnects with low loss and ultra-wide bandwidths have been demonstrated. Coplanar waveguide-based interconnects between GaAs and Si die have been fabricated and characterized and the results compared to expectations from full-wave electromagnetic simulation. Broadband transmission characteristics were obtained, with insertion losses below 0.3 dB at 100 GHz and below 0.8 dB at frequencies up to 220 GHz demonstrated experimentally. The measured return loss exceeded 11.5 dB at all frequencies up to 220 GHz. The interconnects offer low latency, with a measured group delay of 0.69 ps. The measured results are in good agreement with full-wave simulations, indicating that the measured results do not suffer from significant impairments compared to theoretical predictions. The demonstrated interconnects offer an alternative to conventional approaches to millimeter-wave circuit and system integration, by enabling the compact realization of circuits in the microwave, millimeter-wave, sub-millimeter-wave, and THz frequency regimes in heterogeneous device technologies with very low chip-to-chip insertion loss.
KeywordsInterconnects Millimeter-wave circuits Microwave circuits Heterogeneous integration Quilt Packaging
Integrated millimeter-wave and terahertz systems are promising for a wide range of emerging applications, including imaging for security and avionics applications, as well as scientific and industrial applications such as material analysis, detection of subsurface defects, and radiometry (see, e.g., [1, 2, 3]). While significant progress towards system-on-chip millimeter-wave and terahertz functionalities has been made, for high-performance applications, the ability to leverage specialized device technologies (e.g., compound semiconductor devices) and integrate them seamlessly with Si-based electronics in a heterogeneous system provides an attractive approach for achieving advanced functionality in a compact and efficient format. For these sorts of heterogeneous integrated systems, the ability to achieve wide-bandwidth, low-loss, low-latency interconnects between the constituent integrated circuits is essential for achieving sufficient system-level performance. Conventional approaches for system integration can impose limitations on performance (e.g., wirebonding and flip-chip interconnects impose electromagnetic discontinuities that limit bandwidth) or rely on precision machining (e.g., split-block assembly) that, although offering excellent performance, can be expensive and is typically limited to waveguide bands. In this letter, we report the performance of a compact, scalable, heterogeneous chip-to-chip interconnect between GaAs and Si die that offers extremely low insertion loss and latency from DC well into the millimeter-wave and sub-THz regime.
2 Interconnect Design and Fabrication
Design parameters for launchers and nodules
Fabrication processes for high-resistivity Si  and semi-insulating GaAs  die have been reported previously; the key steps are the formation of the inlaid nodules (using inductively coupled reactive ion etching (ICP-RIE), plating, and chemical–mechanical polishing), the formation of partial-thickness die separation streets using ICP-RIE (for the die reported here, the separation etch was ∼150 μm deep, while the wafer thickness was 500 μm), and thinning of the die using backside grinding to a final thickness of 100 μm. This final thinning step also singulates the die. For the structures reported here, the soldering was performed by using solder paste (Kester R276), applied to the nodules using pin transfer, followed by a reflow step at 270 °C for 30 s in laboratory air using commercial die-attach equipment. The fabrication and assembly is based on well-established processes that provide the potential for high throughput and fully automated assembly.
3 Characterization and Interconnect Performance
As can be seen in Fig. 2, a measured insertion loss of less than 0.8 dB from 0.1 to 220 GHz has been obtained, with a measured return loss greater than 11.5 dB over the full frequency range. The measured insertion loss tracks the simulation projections closely, with no more 0.2-dB deviation over the full frequency range. Likewise, the return loss also agrees well, with the most significant deviation being approximately 0.75–2-dB lower return loss at G band from the measurements than that predicted by simulation. The roughly sinusoidal deviation between the measured and simulated insertion loss at G band (140–220 GHz) is attributable to minor imperfections in the second-tier on-wafer calibration. To be conservative, we quote here the highest measured insertion loss. Simulation suggests that an insertion loss of 0.53 dB at 220 GHz should be expected if the calibration artifacts are eliminated. For frequencies up to 110 GHz, worst-case insertion loss is 0.25 dB (at 87.5 GHz in Fig. 2), with a return loss better than 16 dB. These measured results compare favorably with other integration approaches, including flip-chip integration and split-block waveguide-MMIC transitions. Flip-chip integration has been demonstrated with insertion loss of 0.6 dB to 100 GHz at 15-dB return loss (see e.g., ), but typically requires high-impedance compensation sections that increase area and reduce bandwidth . For split-block waveguide transitions, transition losses of approximately 1 dB have been achieved (see e.g., ), corresponding to a chip-to-chip loss of ∼2 dB and return losses of ∼10 dB. Waveguide approaches are limited to the bandwidth of the host waveguide. Recently, a J-band (220–260) transition exhibiting <1-dB insertion loss at 220 GHz and return loss exceeding 10 dB has also been reported, based on silicon micromachining processes and cavity-backed coplanar waveguides . To the authors’ knowledge, the Quilt Packaging-based edge-interconnect structure reported here represents the lowest insertion loss at these millimeter-wave and sub-THz frequencies for heterogeneous chip-to-chip integration, while maintaining return losses above 10 dB, and offering ultra-wide bandwidths (from DC through millimeter-wave frequencies).
Heterogeneous integration between GaAs and Si die using the Quilt Packaging paradigm has been reported for the first time. Extremely low insertion losses below 0.3 and 0.8 dB have been obtained at frequencies up to 110 and 220 GHz, respectively, in good agreement with predictions from numerical electromagnetic simulations. The return loss of the chip-to-chip interconnects is also very good, with measured values exceeding 11.5 dB over the full frequency range from 0.1 to 220 GHz. The demonstrated heterogeneous interconnection approach appears promising for enabling the compact, cost-effective realization of future highly integrated microwave, millimeter-wave, sub-millimeter-wave, and THz circuits and systems based on heterogeneous device technologies.
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