Skip to main content

Advertisement

SpringerLink
Log in

High efficiency, high switching speed, AlGaAs/GaAs P-HEMT DC–DC converter for integrated power amplifier modules

  • Published:
Analog Integrated Circuits and Signal Processing Aims and scope Submit manuscript

Abstract

This paper presents a high efficiency, high switching frequency DC–DC buck converter in AlGaAs/GaAs technology, targeting integrated power amplifier modules for wireless communications. The switch mode, inductor load DC–DC converter adopts an interleaved structure with negatively coupled inductors. Analysis of the effect of negative coupling on the steady state and transient response of the converter is given. The coupling factor is selected to achieve a maximum power efficiency under a given duty cycle with a minimum penalty on the current ripple performance. The DC–DC converter is implemented in 0.5 μm GaAs p-HEMT process and occupies 2 × 2.1 mm2 without the output network. An 8.7 nH filter inductor is implemented in 65 μm thick top copper metal layer, and flip chip bonded to the DC–DC converter board. The integrated inductor achieves a quality factor of 26 at 150 MHz. The proposed converter converts 4.5 V input to 3.3 V output for 1 A load current under 150 MHz switching frequency with a measured power efficiency of 84%, which is one of the highest efficiencies reported to date for similar current/voltage ratings.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14
Fig. 15
Fig. 16
Fig. 17
Fig. 18
Fig. 19
Fig. 20
Fig. 21
Fig. 22
Fig. 23
Fig. 24
Fig. 25
Fig. 26
Fig. 27
Fig. 28
Fig. 29
Fig. 30
Fig. 31
Fig. 32
Fig. 33

Similar content being viewed by others

References

  1. Kitchen, J. N., Deligoz, I., Kiaei, S., & Bakkaloglu, B. (2007). Polar SiGe class E and F amplifiers using switch-mode supply modulation. IEEE Transactions on Microwave Theory and Techniques, 55(5), 845–856.

    Article  Google Scholar 

  2. Qin, J., Guo, R., Park, J., & Huang, A. (2009). A low noise. High efficiency two stage envelope modulators structure for EDGE polar modulation. In Proceedings of IEEE international symposium on circuits and systems, pp. 1089–1092, Taipei.

  3. Hanington, G., Chen, P.-F., Asbeck, P., & Larson, L. (1999). High-efficiency power amplifier using dynamic power-supply voltage for CDMA applications. IEEE Transactions on Microwave Theory and Techniques, 47(8), 1471–1476.

    Article  Google Scholar 

  4. Wong, J. (1990). A low noise low dropout regulator for portable equipment. In Proceedings of Power conversion and intelligent motion, pp. 38–43, May 1990.

  5. Gupta, V., & Rincon-Mora, G. (2007). A 5 mA 0.6 μm CMOS Miller-compensated LDO regulator with −27 dB worst-case power-supply rejection using 60 pF of on-chip capacitance. In Proceedings of IEEE international solid-state circuits conference, pp. 520–521, February 2007.

  6. Lam, Y.-H., & Ki, W.-H. (2008). A 0.9 V 0.35 μm adaptively biased CMOS LDO regulator with fast transient response. In Proceedings of IEEE international solid-state circuits conference, pp. 442–626, February 2008.

  7. Al-Kuran, S., Scheinberg, N., & Saders, J. V. (2000). GaAs switched capacitor DC-to-DC converter. IEEE Journal of Solid-State Circuits, 35(8), 1121–1127.

    Article  Google Scholar 

  8. Favrat, P., Deval, P., & Declercq, M. (1998). A high-efficiency CMOS voltage doubler. IEEE Journal of Solid-State Circuits, 33(3), 410–416.

    Article  Google Scholar 

  9. Ma, D., Su, L., & Somasundaram, M. (2010). Integrated interleaving SC power converters with analog and digital control schemes for energy-efficient microsystems. In Proceedings of Analog integrated circuits and signal, pp. 361–372, March 2010.

  10. Severns, R., & Bloom, G. (1985). Modern DC–DC switch mode power converter circuits. Van Nostrand Reinhold.

    Google Scholar 

  11. Ajram, S., & Salmer, G. (2001). Ultrahigh frequency DC-to-DC converters using GaAs power switches. IEEE Transactions on Power Electronics, 16(5), 594–602.

    Article  Google Scholar 

  12. Rivas, J. M., Jackson, D., Leitermann, O., Sagneri, A. D., Han, Y., & Perreault, D. J. (2006). Design considerations for very high frequency dc–dc converters. In Proceedings of IEEE power electronics specialists conference (PESC ’06), pp. 1–11, June 2006.

  13. Kwak, T.-W., Lee, M.-C., & Cho, G.-H. (2007). A 2W CMOS hybrid switching amplitude modulator for EDGE polar transmitters. IEEE Journal of Solid-State Circuits, 42(12), 2666–2676.

    Article  Google Scholar 

  14. Chu, W.-Y., Bakkaloglu, B., & Kiaei, S. (2008). A 10 MHz-bandwidth 2 mV-ripple PA-supply regulator for CDMA transmitters. In Proceedings of IEEE international solid-state circuits conference, pp. 448–626, February 2008.

  15. Wibben, J., & Harjani, R. (2008). A high-efficiency DC–DC converter using 2 nH integrated inductors. IEEE Journal of Solid-State Circuits, 43, 844–854.

    Article  Google Scholar 

  16. Hazucha, P., Schrom, G., Hahn, J., Bloechel, B., Hack, P., Dermer, G., Narendra, S., Gardner, D., Karnik, T., De, V., & Borkar, S. (2005). A 233-MHz 80%-87% efficient four-phase DC–DC converter utilizing air-core inductors on package. IEEE Journal of Solid-State Circuits, 40, 838–845.

    Google Scholar 

  17. Schrom, G., Hazucha, P., Hahn, J., Gardner, D., Bloechel, B. A., Dermer, G., Narendra, S., Karnik, T., & De, V. (2004). A 480-MHz, multi-phase interleaved buck DC–DC converter with hysteretic control. In Proceedings of IEEE power electronics specialists conference (PESC ’04), pp. 4702–4707, June 2004.

  18. Abedinpour, S., Bakkaloglu, B., & Kiaei, S. (2007). A multistage interleaved synchronous buck converter with integrated output filter in 0.18 μm SiGe process. IEEE Transactions on Power Electronics, 22(6), 2164–2175.

    Article  Google Scholar 

  19. Sun, J., Lu, J., Giuliano, D., Chow, T., & Gutmann, R. (2007). 3D power delivery for microprocessors and high-performance ASICs. In Proceedings of IEEE applied power electronics conference (APEC ’07), pp. 127–133, February 2007.

  20. Li, P., Bhatia, D., Xue, L., & Bashirullah, R. (2008). A 90–240 MHz hysteretic controlled DC–DC buck converter with digital PLL frequency locking. In Proceedings of Custom integrated circuits conference, pp. 21–24, September 2008.

  21. Wen, M., & Steyaert, M. (2008). A fully-integrated 0.18 μm CMOS DC–DC step-down converter, using a bondwire spiral inductor. In Proceedings of Custom integrated circuits conference, pp. 17–20, September 2008.

  22. Wong, P.-L., Xu, P., Yang, P., & Lee, F. (2001). Performance improvements of interleaving VRMs with coupling inductors. IEEE Transactions on Power Electronics, 16(5), 499–507.

    Article  Google Scholar 

  23. Abu-Qahouq, J., Batarseh, M., Huang, L., & Batarseh, I. (2007). Analysis and small signal modeling of a non-uniform multiphase buck converter. In Proceedings of IEEE power electronics specialists conference (PESC ’07), pp. 961–967, June 2007.

  24. Pala, V., Varadarajan, K., & Chow, T. (2009) GaAs pseudomorphic HEMTs for low voltage high frequency DC–DC converters. In Proceedings of international symposium on Power semiconductor devices and IC’s, pp. 120–123, June 2009.

  25. Erickson, R. W., & Maksimovic, D. (2001). Fundamentals of power electronics (2nd ed.). New York: Springer.

    Google Scholar 

  26. ASITIC, http://rfic.eecs.berkeley.edu/niknejad/asitic.html.

  27. Li, P., Xue, L., Hazucha, P., Karnik, T., & Bashirullah, R. (2009). A delay-locked loop synchronization scheme for high-frequency multiphase hysteretic dc–dc converters. IEEE Journal of Solid-State Circuits, 44(11), 3131–3145.

    Article  Google Scholar 

  28. Maneatis, J., & Horowitz, M. (1993). Precise delay generation using coupled oscillators. IEEE Journal of Solid-State Circuits, 28(12), 1273–1282.

    Article  Google Scholar 

  29. Maneatis, J. (1996). Low-jitter process-independent dll and pll based on self-biased techniques. IEEE Journal of Solid-State Circuits, 3(11), 1723–1732.

    Article  Google Scholar 

  30. Hass, K. J., & Cox, D. F. (2000) Level shifting interfaces for low voltage logic. In 9th NASA symposium on VLSI design, pp. 3.1.1–3.1.7.

  31. Coilcraft, available at http://www.coilcraft.com.

Download references

Acknowledgement

The authors would like to acknowledge TriQuint Semiconductor for chip fabrication.

Author information

Authors and Affiliations

  1. ECSE Department, Rensselaer Polytechnic Institute, 110 8th Street, Troy, NY, 12180, USA

    Han Peng, Vipindas Pala, T. Paul Chow & Mona Mostafa Hella

  2. Triquint Semiconductor Inc., Hillsboro, OR, 97124, USA

    Peter Wright

Authors
  1. Han Peng
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Vipindas Pala
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Peter Wright
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. T. Paul Chow
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Mona Mostafa Hella
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Han Peng.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Peng, H., Pala, V., Wright, P. et al. High efficiency, high switching speed, AlGaAs/GaAs P-HEMT DC–DC converter for integrated power amplifier modules. Analog Integr Circ Sig Process 66, 331–348 (2011). https://doi.org/10.1007/s10470-010-9543-z

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10470-010-9543-z

Keywords

Search

Navigation