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A novel placement method for mini-scale passive components in surface mount technology

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Abstract

This paper aims to propose a novel placing method, i.e., place-between-paste-and-pad (PB), for mini-scale passive components to enhance electronic assembly lines’ yield. PB means a component is designed to be placed at the midpoint between the pastes and pads on the length direction while it aligns with the pads’ center on the width direction. An experiment that involves 12 printed circuit boards (PCB) and 4500 resistors R0402M (0.40 mm × 0.20 mm) is designed and conducted to get comparative results of PB and two industrial placing methods, i.e., place-on-pad and place-on-paste. Based on this experiment’s results, PB outperforms the other two methods in terms of minimizing the components’ final misalignment. Furthermore, PB is a low-cost placing strategy because PB does not need the real-time communication between the solder paste inspection machine and the pick-and-place machine. The placement method proposed in this study is expected to offer a low-cost exploration in the pick-and-place procedure to enhance the surface mount assembly quality of mini-scale passive components.

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References

  1. Alelaumi S, Khader N, He J, Lam S, Yoon SW (2021) Residue buildup predictive modeling for stencil cleaning profile decision-making using recurrent neural network. Robot Comput-Integr Manuf 68:102041. https://doi.org/10.1016/j.rcim.2020.102041

    Article  Google Scholar 

  2. Cao S, Parviziomran I, Yang H, Park S, Won D (2019) Prediction of component shifts in pick and place process of surface mount technology using support vector regression. Procedia Manuf 39:210–217. https://doi.org/10.1016/j.promfg.2020.01.316. 25th International Conference on Production Research Manufacturing Innovation: Cyber Physical Manufacturing, August 9–14, 2019, Chicago, Illinois (USA)

    Article  Google Scholar 

  3. Dušek K, Novak M, Rudajevova A (2012) Study of the components self-alignment in surface mount technology. In: 2012 35th International Spring Seminar on Electronics Technology. IEEE, pp 197–200

  4. Ellis JR, Masada GY (1989) Dynamic behavior of SMT chip capacitors during solder reflow. In: Proceedings. Seventh IEEE/CHMT International Electronic Manufacturing Technology Symposium. https://doi.org/10.1109/EMTS.1989.68947, pp 23–29

  5. Fischthal B, Cieslinski M Beyond 0402M placement: process considerations for 03015M microchip mounting. https://www.panasonicfa.com/sites/default/files/pdfs/Beyond0402MPlacement_ProcessConsiderationsfor03015M_Panasonic.pdf. Accessed: 22 Dec 2020

  6. Krammer O (2014) Modelling the self-alignment of passive chip components during reflow soldering. Microelectron Reliab 54(2):457–463. https://doi.org/10.1016/j.microrel.2013.10.010

    Article  Google Scholar 

  7. Krammer O, Illyefalvi-Vitez Z Investigating the self-alignment of chip components during reflow soldering. 52 https://doi.org/10.3311/pp.ee.2008-1-2.08

  8. Liukkonen T, Nummenpaa P, Tuominen A (2004) The effect of lead-free solder paste on component placement accuracy and self-alignment during reflow. Solder Surf Mount Technol 16 (1):44–47. https://doi.org/10.1108/09540910410517040

    Article  Google Scholar 

  9. Lu H, He J, Won D, Yoon S W (2020) A guided evolutionary search approach for real-time stencil printing. IEEE Trans Compon Packag Manuf Technol Optim 1–1. https://doi.org/10.1109/TCPMT.2020.3048649

  10. Pan K, Ha JH, Pham VL, Wang H, Xu J, Park SB (2020) The effect of solder paste volume on solder joint shape and self-alignment of passive components. In: 2020 IEEE 70th Electronic Components and Technology Conference (ECTC). https://doi.org/10.1109/ECTC32862.2020.00204, pp 1289–1297

  11. Parviziomran I, Cao S, Yang H, Park S, Won D (2019) Optimization of passive chip components placement with self-alignment effect for advanced surface mounting technology. Procedia Manuf 39:202–209. https://doi.org/10.1016/j.promfg.2020.01.313

    Article  Google Scholar 

  12. Poon GKK, Williams DJ (1999) Characterization of a solder paste printing process and its optimization. Solder Surf Mount Technol

  13. Prasad R (1989) Surface mount technology: principles and practice

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Acknowledgements

We thank Drs. Seungbae Park and Sangwon Yoon for providing valuable comments and useful discussion in this paper. We also thank Mr. Haeyong Yang (Koh Young Inc.) for providing appropriate support in this paper.

Funding

This work was partially supported by the collaborative research award with Koh Young Technology Inc. (grant no. 1152677) and the Integrated Electronics Engineering Center (IEEC) Pooled Research Award.

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Correspondence to Daehan Won.

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He, J., Cen, Y., Li, Y. et al. A novel placement method for mini-scale passive components in surface mount technology. Int J Adv Manuf Technol 115, 1475–1485 (2021). https://doi.org/10.1007/s00170-021-07147-7

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  • DOI: https://doi.org/10.1007/s00170-021-07147-7

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