Abstract
This paper addresses the precision analysis of filters in the parallel form framework. The precision analysis consists of determining suitable fractional bit-widths to set a tradeoff between resource consumption and computational accuracy. Although the stability of the parallel form is relatively better controlled than the related direct form, its bit-width optimization did not receive much consideration in the literature, despite its significant contribution to the optimization of the filter’s physical implementation. To carry out the needed bit-width optimization, we present two heuristics based on the Estimation of Distribution Algorithm, which falls within the category of probabilistic model-building genetic algorithm. The performance of the proposed approach is discussed, and compared to chosen benchmarks, the results show that our hardware implementations reduce the cost of the resulted circuits up to \(37\%\).
Similar content being viewed by others
Data Availability Statement
The data that support the findings of this study are the benchmarks provided in [36] which have been generated by the authors.
References
A. Aggarwal, T.K. Rawat, D.K. Upadhyay, Optimal design of l 1-norm based iir digital differentiators and integrators using the bat algorithm. IET Signal Process. 11(1), 26–35 (2016)
N. Agrawal, A. Kumar, V. Bajaj, A new method for designing of stable digital iir filter using hybrid method. Circuits Syst. Signal Process. 38(5), 2187–2226 (2019)
C.R. Babu, B.H. Kumar, S.L. Kumari Narava, A heuristic approach of designing parallel filter using an enriched pole placement technique. Order 6(4) (2018)
S. Baluja, Population-based incremental learning. A method for integrating genetic search based function optimization and competitive learning. Tech. rep., Carnegie-Mellon Univ Pittsburgh Pa Dept Of Computer Science (1994)
S. Baluja, R. Caruana, Removing the genetics from the standard genetic algorithm, in Machine Learning Proceedings 1995. (Elsevier, 1995), pp. 38–46
S. Baluja, S. Davies, Combining multiple optimization runs with optimal dependency trees (Carnegie-mellon univ pittsburgh pa dept of computer science, Tech. rep., 1997)
R. Bellal, E.S. Lamini, H. Belbachir, S. Tagzout, A. Belouchrani, Improved affine arithmetic-based precision analysis for polynomial function evaluation. IEEE Trans. Comput. 68(5), 702–712 (2018)
D. Boland, G.A. Constantinides, Bounding variable values and round-off effects using handelman representations. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 30(11), 1691–1704 (2011)
G. Caffarena, C. Carreras, J.A. López, Á. Fernández, Sqnr estimation of fixed-point dsp algorithms. EURASIP J. Adv. Signal Process. 2010(1), 171027 (2010)
A. Carini, V.J. Mathews, G.L. Sicuranza, Sufficient stability bounds for slowly varying direct-form recursive linear filters and their applications in adaptive iir filters. IEEE Trans. Signal Process. 47(9), 2561–2567 (1999)
J.L.D. Comba, J. Stol, A ne arithmetic and its applications to computer graphics, in Proceedings of VI SIBGRAPI (Brazilian Symposium on Computer Graphics and Image Processing) (Citeseer, 1993), pp. 9–18
G.A. Constantinides, P.Y. Cheung, W. Luk, The multiple wordlength paradigm, in The 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM’01) (IEEE, 2001), pp. 51–60
G.A. Constantinides, G.J. Woeginger, The complexity of multiple wordlength assignment. Appl. Math. Lett. 15(2), 137–140 (2002)
J. De Bonet, C. Isbell, P. Viola, Mimic: finding optima by estimating probability densities. Adv. Neural Inf. Process. Syst. 9, 424–430 (1996)
A. Fernandez-Vazquez, G.J. Dolecek, Generalized chebyshev filters for the design of iir filters and filter banks. Circuits Syst. Signal Process. 33(7), 2237–2250 (2014)
G. Harik, et al., Linkage learning via probabilistic modeling in the ecga. IlliGAL report 99010 (1999)
K. Horváth, B. Bank, Optimizing the numerical noise of parallel second-order filters in fixed-point arithmetic. J. Audio Eng. Soc. 67(10), 763–771 (2019)
K.I. Kum, W. Sung, Combined word-length optimization and high-level synthesis of digital signal processing systems. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 20(8), 921–930 (2001)
Lamini, E.s., Bellal, R., Tagzout, S., Belbachir, H., Belouchrani, A.: Enhanced bit-width optimization for linear circuits with feedbacks. In: 2014 9th International Design and Test Symposium (IDT), pp. 168–173. IEEE (2014)
E.S. Lamini, S. Tagzout, H. Belbachir, A. Belouchrani, Precision analysis with analytical bit-width optimisation process for linear circuits with feedbacks. IET Circuits Dev. Syst. 12(5), 563–570 (2018)
P. Larrañaga, J.A. Lozano, Estimation of Distribution Algorithms: A New Tool for Evolutionary Computation, vol. 2 (Springer, 2001)
D.U. Lee, A.A. Gaffar, R.C. Cheung, O. Mencer, W. Luk, G.A. Constantinides, Accuracy-guaranteed bit-width optimization. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 25(10), 1990–2000 (2006)
K. Long, H. Chen, X. Li, Analysis and optimization for hardware implementation of sine/cosine with faithful rounding and monotonicity through piecewise quadratic polynomial. IEICE Electron. Exp. 18, 20210158 (2021)
B. Lopez, Implémentation optimale de filtres linéaires en arithmétique virgule fixe. Ph.D. thesis (2014)
V. Magron, Interval enclosures of upper bounds of roundoff errors using semidefinite programming. ACM Trans. Math. Softw. (TOMS) 44(4), 1–18 (2018)
V. Magron, G. Constantinides, A. Donaldson, Certified roundoff error bounds using semidefinite programming. ACM Trans. Math. Softw. (TOMS) 43(4), 1–31 (2017)
D. Menard, G. Caffarena, J.A. Lopez, D. Novo, O. Sentieys, Fixed-point refinement of digital signal processing systems (2019)
H. Mühlenbein, The equation for response to selection and its use for prediction. Evol. Comput. 5(3), 303–346 (1997)
H. Mühlenbein, G. Paass, From recombination of genes to the estimation of distributions i. binary parameters, in International Conference on Parallel Problem Solving from Nature (Springer, 1996), pp. 178–187
A.V. Oppenheim, J.R. Buck, R.W. Schafer, Discrete-Time Signal Processing, vol. 2 (Prentice Hall, Upper Saddle River, 2001)
G. Ott, E.A. Costa, S.J. Almeida, M.B. Fonseca, Iir filter architectures with truncation error feedback for ecg signal processing. Circuits Syst. Signal Process. 38(1), 329–355 (2019)
Y. Pang, K. Radecka, Z. Zilic, An efficient hybrid engine to perform range analysis and allocate integer bit-widths for arithmetic circuits, in 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011) (IEEE, 2011), pp. 455–460
M. Pelikan, D.E. Goldberg, E. Cantu-Paz, Linkage problem, distribution estimation, and bayesian networks. Evol. Comput. 8(3), 311–340 (2000)
J. Potsangbam, M. Kumar, Design and implementation of combined pipelining and parallel processing architecture for fir and iir filters using vhdl. Int. J. VLSI Des. Commun. Syst. 10(4) (2019)
N. Revol, Introduction à l’arithmétique par intervalles (2001)
O. Sarbishei, Y. Pang, K. Radecka, Analysis of range and precision for fixed-point linear arithmetic circuits with feedbacks, in 2010 IEEE International High Level Design Validation and Test Workshop (HLDVT) (IEEE, 2010), pp. 25–32
O. Sarbishei, K. Radecka, Z. Zilic, Analytical optimization of bit-widths in fixed-point lti systems. IEEE Trans. Comput. -Aided Des. Integr. Circuits Syst. 31(3), 343–355 (2012)
C. Shi, R.W. Brodersen, Automated fixed-point data-type optimization tool for signal processing and communication systems, in Proceedings of the 41st Annual Design Automation Conference (2004), pp. 478–483
J.J. Shynk, Adaptive iir filtering using parallel-form realizations. IEEE Trans. Acoust. Speech Signal Process. 37(4), 519–533 (1989)
D. Sidhu, J. Dhillon, Design of digital iir filter with conflicting objectives using hybrid predator-prey optimization. Circuits Syst. Signal Process. 37(5), 2117–2141 (2018)
R. Singh, S.K. Arya, Genetic algorithm for the design of optimal iir digital filters (2012)
K.S. Tang, K.F. Man, S. Kwong, Z.F. Liu, Design and optimization of iir filter structure using hierarchical genetic algorithms. IEEE Trans. Ind. Electron. 45(3), 481–487 (1998)
T. Technologies, Clocks for the synchronized network: Common generic criteria. GR-1244-CORE. Issue 3. 2005 (2005). http://www.telcordia.com
H.L.N. Thi, S. Van Gerven, C. Jutten, D. Van Compernolle, Stability study for source separation in convolutive mixtures of two sources. Signal Process. 62(2), 163–171 (1997)
J.T. Tsai, J.H. Chou, T.K. Liu, Optimal design of digital iir filters by using hybrid taguchi genetic algorithm. IEEE Trans. Ind. Electron. 53(3), 867–879 (2006)
S. Vakili, J.P. Langlois, G. Bois, Enhanced precision analysis for accuracy-aware bit-width optimization using affine arithmetic. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 32(12), 1853–1865 (2013)
Y. Yuan, C. Chen, X. Hu, S. Peng, Unlabeled data driven channel-wise bit-width allocation and quantization refinement. Aust. J. Intell. Inf. Process. Syst. 16(4), 9–16 (2019)
Funding
The authors did not receive support from any organization for the submitted work.
Author information
Authors and Affiliations
Corresponding author
Ethics declarations
Conflict of interest
The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.
Additional information
Publisher's Note
Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
Rights and permissions
About this article
Cite this article
Zelmat, M., Lamini, ES., Tagzout, S. et al. Precision Analysis for an Optimal Parallel IIR Filter’s Implementation. Circuits Syst Signal Process 41, 4512–4546 (2022). https://doi.org/10.1007/s00034-022-01988-7
Received:
Revised:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s00034-022-01988-7