Normalized Nonlinear Semiempirical MOST Model Used in Monolithic RF Class A-to-C PAs

Abstract

This paper presents a simple but accurate normalized nonlinear large-signal semiempirical MOS transistor model to be used in monolithic RF Class A-to-C PAs. MOS transistor characteristics, saved in lookup tables, are extracted for different PVT corners, allowing the study of the PA performance spread. Model accuracy is ratified by the excellent matching obtained when comparing data algebraically calculated with electrical simulations of hundreds of PAs, and with the measurement data of a fabricated 2.4 GHz PA.

Appendix

1.1 Appendix A: Expressions of PA Efficiencies: ηMOS and ηFMW

This section collects the set of equations necessary to size the PA MOST, as well as the design efficiencies.

It is assumed that gate and drain voltage waveforms (8) and (11) are known, and therefore, normalized memoryless drain current has been estimated by (2). Impedance condition (9) is fulfilled when the load seen at M₁ drain at f₀ is a resistance R_FNW; then, MOST inverts the gate waveform provoking the anti-phase of the first harmonic of drain voltage signal, ϕ_D1 ≈ ϕ_G + π, and the power P_FNW entering the FNW shown in Fig. 6b at f₀ is:

$$ P_{\text{FNW}} = (1/2)I_{1} V_{{{\text{D}}1}} = (V_{\text{D}}^{\text{RF}} )^{2} /2R_{\text{FNW}} $$

(14)

where definitions of (10) and (11) have been used.

The output power P_o at f₀ can be seen as the remaining power delivered to the load after a fraction of P_FNW and P_loss is lost in the parasitic resistance R_ind(f₀) of the picked inductor:

$$ P_{\text{o}} = P_{\text{out}} (f_{0} ) = P_{\text{FNW}} - P_{\text{loss}} = \frac{{(V_{\text{D}}^{\text{RF}} )^{2} }}{{2R_{\text{FNW}} }} - \frac{{(V_{\text{D}}^{\text{RF}} )^{2} }}{{2R_{\text{ind}} (f_{0} )}}. $$

(15)

Solving for R_FNW,

$$ R_{\text{FNW}} = \left( {\frac{1}{{R_{\text{ind}} (f_{0} )}} + \frac{{2P_{\text{o}} }}{{(V_{\text{D}}^{\text{RF}} )^{2} }}} \right)^{ - 1} . $$

(16)

Now, the first harmonic of drain current i_rD is determined as

$$ I_{1} = {{V_{\text{D}}^{\text{RF}} } \mathord{\left/ {\vphantom {{V_{\text{D}}^{\text{RF}} } {R_{\text{FNW}} }}} \right. \kern-0pt} {R_{\text{FNW}} }}. $$

(17)

The MOST width W can now be derived considering the normalization ratio between I₁ and $\widehat{I}_{1}$:

$$ W = {{I_{1} } \mathord{\left/ {\vphantom {{I_{1} } {\widehat{{I_{1} }}}}} \right. \kern-0pt} {\widehat{{I_{1} }}}}. $$

(18)

Now, the value of MOST output capacitance, C_oMOS, is estimated from LUT Λ_CoMOS: $C_{\text{oMOS}} \approx W \cdot \hat{C}_{\text{oMOS}} (V_{\text{G}}^{\text{DC}} ,V_{\text{G}}^{\text{RF}} )$.

The total average power consumed by the PA, P_DC, is a function of $\hat{I}_{\text{DC}}$, W and the supply voltage V_DD as follows:

$$ P_{\text{DC}} = I_{\text{DC}} V_{\text{DD}} = W \cdot \hat{I}_{\text{DC}} V_{\text{DD}} $$

(19)

and the PA efficiency results as

$$ \eta = \frac{{P_{\text{o}} }}{{P_{\text{DC}} }} = \frac{{P_{\text{FNW}} }}{{P_{\text{DC}} }}\frac{{P_{\text{o}} }}{{P_{\text{FNW}} }} = \eta_{{\rm MOS}} \eta_{{\rm FNW}} , $$

(20)

where P_FNW is the power injected into FNW, defined in (13).

MOST efficiency, η_MOS, results from (13), (15) and (18):

$$ \eta_{\text{MOS}} = \frac{{P_{\text{FNW}} }}{{P_{\text{DC}} }} = \frac{{I_{1} V_{\text{D}}^{\text{RF}} }}{{2I_{\text{DC}} V_{\text{DD}} }} = \frac{{\widehat{I}_{1} V_{\text{D}}^{\text{RF}} }}{{2\hat{I}_{\text{DC}} V_{\text{DD}} }} $$

(21)

and the output network efficiency, η_FNW, from (15):

$$ \eta_{\text{FNW}} = \frac{{P_{\text{o}} }}{{P_{\text{FNW}} }} = 1 - \frac{{P_{\text{loss}} }}{{P_{\text{FNW}} }} = 1 - \frac{{R_{\text{FNW}} }}{{R_{\text{ind}} (f_{0} )}}. $$

(22)

Note that, from (19), (20) and (21), the PA efficiency, η, is independent of the MOST size.

1.2 Appendix B: Expressions of Filtering Network Capacitances: Cop and Cos

This section assumes the rest of components in PA, MOST and inductor, are already known. Here, we will consider a more general case where the PA has a non-resistive load, $Z_{L} = R_{L} + jX_{L}$. One of the requirements to achieve high-efficiency values at the working frequency f₀ is to enforce that Z_inFNW(f₀) = R_FNW, where this value must result from the parallel between two resistance values, the real part of inductor, R_ind(f₀), and a pure-resistive effective load, R_L,eff(f₀). This is, $R_{\text{FNW}} = R_{\text{ind}} (f_{0} )||R_{{L,{\text{eff}}}} (f_{0} )$.

The pure-resistive effective load is the transformation of load impedance, Z_L, by the L–C network of FNW at f₀ (see Fig. 6b). Since we have already sized the MOST and inductor, we have the impedance of L–C components to the left of C_os:

$$ Z_{m0} = Z_{m} (f_{0} ) = R_{{L,{\text{eff}}}} (f_{0} )||L_{\text{ind}} (f_{0} )||C_{\text{oMOS}} (f_{0} ) $$

(23)

with $R_{{L,{\text{eff}}}}^{ - 1} = R_{\text{FNW}}^{ - 1} - R_{\text{ind}}^{ - 1} (f_{0} )$.

Then, the capacitors, C_op and C_os, are the elements that transform that impedance, Z_m0, in the conjugate of the load impedance. When ${\text{real}}(Z_{m0} ) > R_{L}$, a capacitive output network is not always possible, then the best procedure is to reject the present design and find another inductor with lower inductance until it verifies that ${\text{real}}(Z_{m0} ) \le R_{L}$, and then a solution exists for the output capacitors. If it is defined that $Z_{m0} = R_{m0} + jX_{m0}$, derived values for these components are:

$$ \begin{aligned} C_{\text{os}} & = \left( {\omega_{0} \left( {X_{m0} - R_{m0} \sqrt {\left( {\left| {Z_{L} } \right|^{2} /R_{m0} R_{L} } \right) - 1} } \right)} \right)^{ - 1} \\ C_{\text{op}} & = {{\left( {R_{L} \sqrt {\left( {\left| {Z_{L} } \right|^{2} /R_{m0} R_{L} } \right) - 1} + X_{L} } \right)} \mathord{\left/ {\vphantom {{\left( {R_{L} \sqrt {\left( {\left| {Z_{L} } \right|^{2} /R_{m0} R_{L} } \right) - 1} + X_{L} } \right)} {\left( {\omega_{0} \left| {Z_{L} } \right|^{2} } \right)}}} \right. \kern-0pt} {\left( {\omega_{0} \left| {Z_{L} } \right|^{2} } \right)}}. \\ \end{aligned} $$

(24)

1.3 Appendix C: Drain Voltage and Power of Output Signal

If it is assumed the normalized memoryless drain current is estimated as it was explained in Sect. 2.1, and all PA elements are sized according to previous appendices, an approximation to actual PA output and drain signals, v_o(t), v_D(t), are, respectively, determined by the FNW transimpedance and impedance functions, TR (s) and Z_inFNW (s). This way, harmonics of these signals are:

$$ \begin{aligned} V_{ok} & = \left| {{\text{TR}}(k\omega_{0} )} \right| \cdot I_{k} ,\quad V_{Dk} = \left| {Z_{\text{inFNW}} (k\omega_{0} )} \right| \cdot I_{k} ,\quad k \le H \\ \phi_{ok} & = \angle {\text{TR}}(k\omega_{0} ) + \phi_{Ik} ,\quad \phi_{Dk} = \angle Z_{\text{inFNW}} (k\omega_{0} ) + \phi_{Ik} \\ \end{aligned} $$

(25)

where current harmonics are obtained by de-normalization

$$ I_{k} = W \cdot \hat{I}_{k} ,\quad k \le H $$

(26)

and network functions are:

$$ \begin{aligned} {\text{TR}}(s) & = \frac{{sC_{\text{os}} Z_{L} }}{D(s)},\quad Z_{\text{inFNW}} (s) = \frac{{1 + s(C_{\text{op}} + C_{\text{os}} )Z_{L} }}{D(s)}, \\ D(s) & = Y_{o} (s) + s\left( {C_{\text{os}} + (C_{\text{op}} + C_{\text{os}} )Z_{L} Y_{o} (s)} \right) + s^{2} C_{\text{os}} C_{\text{op}} Z_{L} \\ \end{aligned} $$

(27)

with Y_o the parallel complex admittance that gathers inductor L_o and C_oMOS.

Power of output harmonics is:

$$ P_{{kf_{0} }} = P_{\text{out}} \left( {kf_{0} } \right) = \left| {V_{ok} } \right|^{2} /(2R_{L} ),\quad k \le H $$

(28)

and finally, the power gain is

$$ G_{\text{PA}} = P_{\text{o}} /P_{\text{inPA}} = 2{{P_{\text{o}} } \mathord{\left/ {\vphantom {{P_{\text{o}} } {\left( {(V_{G}^{\text{RF}} )^{2} \cdot {\text{real}}\left( {Y_{\text{inMOS}} } \right)} \right)}}} \right. \kern-0pt} {\left( {(V_{G}^{\text{RF}} )^{2} \cdot {\text{real}}\left( {Y_{\text{inMOS}} } \right)} \right)}}. $$

(29)