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Atomic Layer Deposition in the Production of a Gate HkMG Stack Structure with a Minimum Topological Size of 32 nm

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Abstract

The plasma-enhanced atomic layer deposition (PEALD) of a High-K Dielectric and Metal Gate (HkMG) stack for MIS transistors, including the subgate HfO2 (2–4 nm) dielectric layer, the ultrathin metallic stabilizing hafnium nitride HfN (1–3 nm) layer, and the basic metallic gate layer from tantalum nitride ТаN (10–20 nm), on silicon plates with a diameter of 200 mm is studied. The spectral ellipsometry method is applied to measure the homogeneity of the deposited film thickness. The dielectric constant of the dielectric in the stack, the leak current, and the breakdown voltage are examined. The four-probe method is used to study the specific electric resistance of tantalum nitride deposited by the atomic layer deposition ALD method. The film thickness homogeneity as a function of the ALD process parameters is examined. The specific resistance of the metallic TaN layer as a function of the composition and parameters of the plasma discharge are studied.

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Authors and Affiliations

  1. Institute of Physics and Technology, Russian Academy of Sciences, Moscow, 117218, Russia

    K. V. Rudenko, A. V. Myakon’kikh & A. E. Rogozhin

  2. Scientific Research Institute of Molecular Electronics, Zelenograd, Moscow, 124460, Russia

    O. P. Gushchin & V. A. Gvozdev

Authors
  1. K. V. Rudenko
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  2. A. V. Myakon’kikh
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  3. A. E. Rogozhin
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  4. O. P. Gushchin
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  5. V. A. Gvozdev
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Correspondence to K. V. Rudenko.

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Original Russian Text © K.V. Rudenko, A.V. Myakon’kikh, A.E. Rogozhin, O.P. Gushchin, V.A. Gvozdev, 2018, published in Mikroelektronika, 2018, Vol. 47, No. 1.

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Rudenko, K.V., Myakon’kikh, A.V., Rogozhin, A.E. et al. Atomic Layer Deposition in the Production of a Gate HkMG Stack Structure with a Minimum Topological Size of 32 nm. Russ Microelectron 47, 1–10 (2018). https://doi.org/10.1134/S1063739718010055

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  • DOI: https://doi.org/10.1134/S1063739718010055

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