Skip to main content
Log in

Analytical Modeling of Harmonic Distortions in GAA Junctionless FETs for Reliable Low-Power Applications

  • Original Research Article
  • Published:
Journal of Electronic Materials Aims and scope Submit manuscript

Abstract

The harmonic distortions (HDs) of a rectangular gate-all-around (GAA) junctionless (JL) field-effect transistor (FET) are analyzed using three-dimensional (3D) analytical modeling. The potential function [\(\psi (x,y,z)\)] of the device is derived based on the semianalytical dimension-based weighted-sum approximation approach. This method eliminates the complex mathematical computations of conventional 3D analysis and, at the same time, provides an alternate solution that yields good accuracy. The effect of flexible depletion lengths in the OFF-state is also taken into consideration, by solving biquadratic equations. The expression for the drain current is derived considering the above-mentioned potential function. Moreover, with this current expression, the harmonic distortions are evaluated and analyzed for reliable low-power applications. The proposed model is validated by comparing the analytical results with simulated data obtained from the 3D ATLAS device simulator. In addition, the output and harmonic characteristics of a cascode amplifier designed using GAA JL FETs are studied in detail.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8

Similar content being viewed by others

References

  1. C.W. Lee, A. Borne, I. Ferain, A. Afzalian, R. Ran, N.D. Akhavan, P. Razavi, and J.P. Colinge, IEEE Trans. Electron Devices 57, 620 (2010).

    Article  CAS  Google Scholar 

  2. C.-W. Lee, A. Afzalian, N.D. Akhavan, R. Yan, I. Ferain, and J.-P. Colinge, Appl. Phys. Lett. 94, 053511 (2009).

    Article  Google Scholar 

  3. J.-P. Colinge, C.-W. Lee, A. Afzalian, N.D. Akhavan, R. Yan, I. Ferain, P. Razavi, B. O’Neill, A. Blake, M. White, A.-M. Kelleher, B. McCarthy and R. Murphy, Nat. Nanotechnol. 5, 225 (2010).

    Article  CAS  Google Scholar 

  4. D. Gola, B. Singh, and P.K. Tiwari, IEEE Trans. Electron Devices 36, 1663 (2018).

    Article  Google Scholar 

  5. Y. Xiao, X. Lin, H. Lou, B. Zhang, L. Zhang, and M. Chan, IEEE Trans. Electron Devices 63, 4661 (2016).

    Article  Google Scholar 

  6. M.S. Parihar, D. Ghosh, and A. Kranti, IEEE Trans. Electron Devices 60, 1540 (2013).

    Article  Google Scholar 

  7. A. Martinez, M. Aldegunde, N. Seoane, A.R. Brown, J.R. Barker, and A. Asenov, IEEE Trans. Electron Devices 58, 2209 (2011).

    Article  CAS  Google Scholar 

  8. H.F. Dadgour, V. De, K. Banerjee, in Proc. IEEE/ACM Int. Conf. Comput.-Aided Design. (2008), p. 270

  9. J. Wang, E. Polizzi, A. Ghosh, S. Datta, and M. Lundstrom, Appl. Phys. Lett. 87, 043101 (2005).

    Article  Google Scholar 

  10. G. Pei, J. Kedzierski, P. Oldiges, M. Ieong, and E.C.-C. Kan, IEEE Trans. Electron Devices 49, 1411 (2002).

    Article  Google Scholar 

  11. H.A. El Hamid, J.R. Guitart, V. Kilchytska, D. Flandre, and B. Iñiguez, IEEE Trans. Electron Devices 54, 2487 (2007).

    Article  Google Scholar 

  12. C.P. Auth, and J.D. Plummer, IEEE Trans. Electron Devices 45, 2381 (1998).

    Article  CAS  Google Scholar 

  13. A. Tsormpatzoglou, C.A. Dimitriadis, R. Clerc, G. Pananakakis, and G. Ghibaudo, IEEE Trans. Electron Devices 55, 2623 (2008).

    Article  CAS  Google Scholar 

  14. D. Gola, B. Singh, and P.K. Tiwari, IEEE Trans. Electron Devices 64, 3534 (2017).

    Article  CAS  Google Scholar 

  15. Y. Taur, X. Liang, W. Wang, and H. Lu, IEEE Electron Device Lett. 25, 107 (2004).

    Article  Google Scholar 

  16. E. Moreno, J. Roldán, F. Ruiz, D. Barrera, A. Godoy, and F. Gámiz, Solid State Electron 54, 1463 (2010).

    Article  CAS  Google Scholar 

  17. E. Moreno Perez, J. Roldan Aranda, F. Garcia Ruiz, D. Barrera Rosillo, M. Ibanez Perez, A. Godoy, and F. Gamiz, IEEE Trans. Electron Devices 58, 2854 (2011)

    Article  Google Scholar 

  18. F. Liu, J. He, L. Zhang, J. Zhang, J. Hu, C. Ma, and M. Chan, IEEE Trans. Electron Devices 55, 2187 (2008).

    Article  CAS  Google Scholar 

  19. W. Sansen, IEEE Trans Circuits Syst Analog Digital Signal Process 46, 315 (1999).

    Article  Google Scholar 

  20. D. Moon, S. Choi, J.P. Duarte, and Y. Choi, IEEE Trans. Electron Devices 60, 1355 (2013).

    Article  CAS  Google Scholar 

  21. N. Jaiswal, and A. Kranti, IEEE Trans. Electron Devices 65, 3669 (2018).

    Article  CAS  Google Scholar 

  22. J.-P. Colinge, A. Kranti, R. Yan, I. Ferain, N.D. Akhavan, P. Razavi, C.-W. Lee, R. Yu, and C. Colinge, ECS Trans. 35, 63 (2011).

    Article  CAS  Google Scholar 

  23. A. Gnudi, S. Reggiani, E. Gnani, and G. Baccarani, IEEE Trans. Electron Devices 60, 1342 (2013).

    Article  Google Scholar 

  24. S.K. Mapa, Higher Algebra: Abstract And Linear, revised Ninth Edition. (Sarat Book House, Kolkata, 2003)

    Google Scholar 

  25. A. Chattopadhyay, C. Bose, and C.K. Sarkar, Silicon 13, 375 (2020).

    Article  Google Scholar 

  26. H.C. Pao and C.T. Sah, Solid-State Electron. 9, 927 (1966).

    Article  Google Scholar 

  27. A. Chattopadhyay, R. Das, A. Dasgupta, A. Kundu, and C.K. Sarkar, Superlatt. Microstruct. 107, 69 (2017).

    Article  CAS  Google Scholar 

  28. A. Cerdeira, M.A. Alemán, M. Estrada, and D. Flandre, Solid-State Electron. 48, 2225 (2004).

    Article  CAS  Google Scholar 

  29. R.T. Doria, A. Cerdeira, J.A. Martino, E. Simoen, C. Claeys and M.A. Pavanello, IEEE Trans. Electron Devices 57, 3303 (2010).

    Article  Google Scholar 

  30. G. Groenewold, and W.J. Lubbers, IEEE Trans. Circuits Syst. II Analog Digit.Signal Process. 41, 569 (1994)

    Article  Google Scholar 

  31. ATLAS User’s Manual, Silvaco (Santa Clara, CA, USA, 2015)

  32. N.D. Arora, and G.S. Gildenblat, IEEE Trans. Electron Devices 34, 89 (1987).

    Article  Google Scholar 

  33. C. Lombardi, S. Manzini, A. Saporito, and M. Vanzi, IEEE Trans. CAD 7, 89(1988).

    Google Scholar 

  34. J. Lacord, J.L. Huguenin, T. Skotnicki, G. Ghibaudo, and F. Boeuf, IEEE Trans. Electron Devices 59, 2534 (2012).

    Article  Google Scholar 

  35. C. Hacker and A. Diebold, 2012 Updates to the International Technology Roadmap for Semiconductors (ITRS) Metrology Chapter (Future Fab International, 2013). Accessed 18 May 2021.

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Ankush Chattopadhyay.

Ethics declarations

Conflict of interest

The authors declare that they have no conflicts of interest.

Additional information

Publisher’s Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Appendix

Appendix

$$\begin{aligned} \begin{aligned}&\gamma _1=\sqrt{\frac{1+\frac{C_{\text {ox}}}{\epsilon _{\text {Si}}}{\widetilde{z}} - \frac{C_{\text {ox}}}{\epsilon _{\text {Si}}W} {\widetilde{z}}^{2}}{\frac{2C_{\text {ox}}}{\epsilon _{\text {Si}}W}}}, \ \ \gamma _2=\frac{C_{\text {ox}}\phi _{1}}{\epsilon _{\text {Si}}} \left( \frac{{\widetilde{z}}^2}{W} - {\widetilde{z}} \right) \\&P_6=-\gamma _2-\gamma ^{2}_{1} \left[ \frac{qN_{\rm d}}{\epsilon _{\text {Si}}} + \frac{2C_{\text {ox}}\phi _{1}}{\epsilon _{\text {Si}} W} \right] , \ \ \eta _1= \frac{t_{\text {Si}}}{W + t_{\text {Si}}} \\&\gamma _3=\sqrt{\frac{1+\frac{C_{\text {ox}}W}{4 \epsilon _{\text {Si}}}}{\frac{2C_{\text {ox}}}{\epsilon _{\text {Si}}W}}}, \ \gamma _4=\frac{-C_{\text {ox}}W\phi _{1}}{4 \epsilon _{\text {Si}}}, \ \eta _2 = \frac{W}{W + t_{\text {Si}}} \\&P_9=\gamma _4+\gamma ^{2}_{3} \left[ \frac{qN_{\rm d}}{\epsilon _{\text {Si}}} + \frac{2C_{\text {ox}}\phi _{1}}{\epsilon _{\text {Si}} W} \right] , \ \gamma _6 = \exp \left( -\frac{L}{\gamma ^{'}}\right) - \exp \left( \frac{L}{\gamma ^{'}}\right), \\&\gamma _7 = \exp \left( -\frac{L}{\gamma ^{'}}\right) + \exp \left( \frac{L}{\gamma ^{'}}\right) , \ \ \gamma _8 = -\frac{2 \gamma ^{'} \gamma _7}{\gamma _6}, \\&\gamma _9 = -\frac{4 \gamma ^{'}}{\gamma _6}, \ \ \gamma _{10} = \frac{2 \epsilon _{\text {Si}} \psi _{\text {bi}}}{q N_{\rm d}} - \frac{4 \epsilon _{\text {Si}} \eta ^{'} P^{'}}{q N_{\rm d}}, \\&\gamma _{11} = \frac{2 \epsilon _{\text {Si}} (\psi _{\text {bi}} + V_{\rm d})}{q N_{\rm d}} - \frac{4 \epsilon _{\text {Si}} \eta ^{'} P^{'}}{q N_{\rm d}}, \ \ \gamma _{12} = 2 \gamma _{8}, \\&\gamma _{13} = \gamma ^{2}_{8} - 2 \gamma _{10} -\gamma _{8} \gamma _{9}, \ \gamma _{14} = \gamma ^{3}_{9} - \gamma _{8} \gamma _{10} -\gamma ^{2}_{8} \gamma _{9}, \\&\gamma _{15} = \gamma ^{2}_{10} + \gamma _{8} \gamma _{9} \gamma _{10} - \gamma ^{2}_{9} \gamma _{11}, \ \ \gamma _{16} = \gamma ^{2}_{8} - 2 \gamma _{11} - \gamma _{8} \gamma _{9}, \\&\gamma _{17} = \gamma ^{3}_{9} - 2 \gamma _{8} \gamma _{11} - \gamma ^{2}_{8} \gamma _{9}, \ \ \gamma _{18} = \gamma ^{2}_{11} + \gamma _{8} \gamma _{9} \gamma _{11} - \gamma ^{2}_{9} \gamma _{10}. \end{aligned} \end{aligned}$$
(23)

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Chattopadhyay, A., Chanda, M., Bose, C. et al. Analytical Modeling of Harmonic Distortions in GAA Junctionless FETs for Reliable Low-Power Applications. Journal of Elec Materi 50, 4606–4618 (2021). https://doi.org/10.1007/s11664-021-08999-1

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11664-021-08999-1

Keywords

Navigation