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A pseudo 2-D surface potential model of a dual material double gate junctionless field effect transistor

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Abstract

In this paper, we have developed a pseudo two-dimensional (2-D) analytical model for the surface potential of a dual-material double-gate junctionless field-effect transistor. We have incorporated the effects of depletion into the source and drain regions to model the surface potential for all three operating modes: (a) full depletion, (b) partial depletion, and (c) near flatband. The effects of the device parameters such as oxide thickness, silicon thickness, and impurity concentration on the surface potential is demonstrated through the model. The model is further extended to derive an expression for the threshold voltage which predicts the expected change with respect to variation in the device parameters. The accuracy of the proposed model is verified against 2-D numerical simulations.

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Authors and Affiliations

  1. Department of Electrical Engineering, Indian Institute of Technology Delhi, Hauz Khas, New Delhi, 1100016, India

    Ashutosh Kumar Agrawal, P. N. V. R. Koutilya & M. Jagadesh Kumar

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  1. Ashutosh Kumar Agrawal
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  2. P. N. V. R. Koutilya
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  3. M. Jagadesh Kumar
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Correspondence to M. Jagadesh Kumar.

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Agrawal, A.K., Koutilya, P.N.V.R. & Jagadesh Kumar, M. A pseudo 2-D surface potential model of a dual material double gate junctionless field effect transistor. J Comput Electron 14, 686–693 (2015). https://doi.org/10.1007/s10825-015-0710-4

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  • DOI: https://doi.org/10.1007/s10825-015-0710-4

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