Progressive and explicit refinement of scheduling for multidimensional data-flow applications using UML MARTE Calin GlitiaJulien DeAntoniAbdoulaye Gamatié OriginalPaper 02 August 2014 Pages: 1 - 33
Design methodology for on-chip-based processor debugger Hyeongbae ParkJingzhe XuGyun Woo OriginalPaper 23 April 2014 Pages: 35 - 57
The fast evolving landscape of on-chip communication Davide BertozziGiorgos DimitrakopoulosSören Sonntag OriginalPaper 30 April 2014 Pages: 59 - 76
LSB-Tree: a log-structured B-Tree index structure for NAND flash SSDs Bo-kyeong KimDong-Ho Lee OriginalPaper 21 June 2014 Pages: 77 - 100
Data pattern aware FTL for SLC+MLC hybrid SSD Se Jin KwonTae-Sun Chung OriginalPaper 24 May 2014 Pages: 101 - 127
Redundancy optimization for error recovery in digital microfluidic biochips Mirela AlistarPaul PopJan Madsen OriginalPaper 13 January 2015 Pages: 129 - 159
Application-aware deduplication for performance improvement of flash memory Joon-Young PaikTae-Sun ChungEun-Sun Cho OriginalPaper 27 September 2014 Pages: 161 - 188
Enabling FPGA routing configuration sharing in dynamic partial reconfiguration Brahim Al FarisiKarel HeyseDirk Stroobandt OriginalPaper 18 September 2014 Pages: 189 - 221