Abstract
In modern millimeter and sub-millimeter communication systems, particle physics, neutrino astronomy, and for passive applications in radio astronomy or remote atmospheric sensing, the trend is to eliminate analog functional blocks, such as mixers and filters, by converting the signal into the digital domain as early as possible in the processing chain. Therefore, fast analog-to-digital converters (ADC) are needed. Track-and-hold (TAH) circuits can reduce time constraints by holding the analog input value while comparators are sampled, in order to minimize the aperture time errors. This article describes the design of a TAH using the 65 nm CMOS technology from STMicroelectronics. A fully differential architecture has been adopted. The circuit exhibits a −3 dB input bandwidth wider than 8 GHz. At 8 GHz, the maximum sampling frequency, the measured overall power consumption and gain are 178 mW and −2 dB, respectively. The TAH core dissipates around 40 mW. The measured total harmonic distortion (THD) at Nyquist sampling conditions is about −37 dB. The circuit die area is 1.1 mm².
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The authors thank STMicroelectronics for providing their 65 nm CMOS technology and for fabricating the circuit.
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Mattos, D., Hellmuth, P., Recoquillon, C. et al. Design of a 65 nm CMOS 8 GHz wideband: track-and-hold, for radio astronomy and cosmology applications. Analog Integr Circ Sig Process 73, 779–787 (2012). https://doi.org/10.1007/s10470-012-9915-7
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DOI: https://doi.org/10.1007/s10470-012-9915-7