Abstract
In this work, the impact of transistor aging on analog circuits processed in a conventional nm CMOS process has been investigated. All important transistor aging effects have been studied and compact models for each important effect have been developed. Also, a circuit reliability simulation flow has been proposed. Finally, the flow has been applied to a set of analog circuits and the impact of aging has been studied.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2013 Springer Science+Business Media New York
About this chapter
Cite this chapter
Maricau, E., Gielen, G. (2013). Conclusions. In: Analog IC Reliability in Nanometer CMOS. Analog Circuits and Signal Processing. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-6163-0_7
Download citation
DOI: https://doi.org/10.1007/978-1-4614-6163-0_7
Published:
Publisher Name: Springer, New York, NY
Print ISBN: 978-1-4614-6162-3
Online ISBN: 978-1-4614-6163-0
eBook Packages: EngineeringEngineering (R0)