Abstract
This paper presents the first model-checking algorithm for an expressive modal mu-calculus over timed automata, \(L^{\mathit{rel}, \mathit{af}}_{\nu,\mu}\), and reports performance results for an implementation. This mu-calculus contains extended time-modality operators and can express all of TCTL. Our algorithmic approach uses an “on-the-fly” strategy based on proof search as a means of ensuring high performance for both positive and negative answers to model-checking questions. In particular, a set of proof rules for solving model-checking problems are given and proved sound and complete; our algorithm then model-checks a property by constructing a proof (or showing none exists) using these rules. One noteworthy aspect of our technique is that we show that verification performance can be improved with derived rules, whose correctness can be inferred from the more primitive rules on which they are based. In this paper, we give the basic proof rules underlying our method, describe derived proof rules to improve performance, and we compare our implementation to UPPAAL.
Research supported by NSF grant CCF-0926194. The Appendix to this paper is available as a supplement on arXiv [16].
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References
Aceto, L., Laroussinie, F.: Is your model checker on time? on the complexity of model checking for timed modal logics. Journal of Logic and Algebraic Programming 52-53, 7–51 (2002)
Alur, R.: Timed Automata. In: Halbwachs, N., Peled, D.A. (eds.) CAV 1999. LNCS, vol. 1633, pp. 8–22. Springer, Heidelberg (1999)
Alur, R., Courcoubetis, C., Dill, D.: Model-checking in dense real-time. Information and Computation 104(1), 2–34 (1993)
Alur, R., Dill, D.L.: A theory of timed automata. Theoretical Computer Science 126(2), 183–235 (1994)
Behrmann, G., Larsen, K.G., Pearson, J., Weise, C., Yi, W.: Efficient Timed Reachability Analysis Using Clock Difference Diagrams. In: Halbwachs, N., Peled, D.A. (eds.) CAV 1999. LNCS, vol. 1633, pp. 341–353. Springer, Heidelberg (1999)
Behrmann, G., David, A., Larsen, K.G.: A tutorial on uppaal. In: Bernardo, M., Corradini, F. (eds.) SFM-RT 2004. LNCS, vol. 3185, pp. 200–236. Springer, Heidelberg (2004)
Bouyer, P., Cassez, F., Laroussinie, F.: Timed modal logics for real-time systems. Journal of Logic, Language and Information 20(2), 169–203 (2011)
Bowman, H., Gomez, R.: How to stop time stopping. Formal Aspects of Computing 18(4), 459–493 (2006)
Clarke, E.M., Emerson, E.A., Sistla, A.P.: Automatic verification of finite-state concurrent systems using temporal logic specifications. TOPLAS 8(2), 244–263 (1986)
Cleaveland, R.: Tableau-Based Model Checking in the Propositional Mu-Calculus. Acta Informatica 27(9), 725–747 (1990)
Cleaveland, R., Steffen, B.: A Linear-Time Model-Checking Algorithm for the Alternation-Free Modal Mu-Calculus. Formal Methods in System Design 2(2), 121–147 (1993)
Emerson, E.A., Lei, C.L.: Efficient Model Checking in Fragments of the Propositional Mu-Calculus. In: LICS 1986, pp. 267–278. IEEE Computer Society (1986)
Fontana, P., Cleaveland, R.: Data Structure Choices for On-the-Fly Model Checking of Real-Time Systems. In: DIFTS 2011, pp. 13–21 (2011)
Fontana, P., Cleaveland, R.: Expressiveness results for timed modal-mu calculi (2014) (in Preparation Preprint available upon request)
Fontana, P., Cleaveland, R.: A menagerie of timed automata. ACM Computing Surveys 46(3), 40:1–40:56 (2014)
Fontana, P., Cleaveland, R.: The power of proofs: New algorithms for timed automata model checking (appendix). arXiv.org (2014)
Heitmeyer, C., Lynch, N.: The generalized railroad crossing: a case study in formal verification of real-time systems. In: RTSS 1994, pp. 120–131 (December 1994)
Henzinger, T., Nicollin, X., Sifakis, J., Yovine, S.: Symbolic model checking for real-time systems. Information and Computation 111(2), 193–244 (1994)
Laroussinie, F., Larsen, K.G.: CMC: A tool for compositional model-checking of real-time systems. In: Budkowski, S., Cavalli, A., Najm, E. (eds.) Formal Description Techniques and Protocol Specification, Testing and Verification. IFIP, pp. 439–456. Springer, US (1998)
Peter, H.J., Ehlers, R., Mattmüller, R.: Synthia: Verification and synthesis for timed automata. In: Gopalakrishnan, G., Qadeer, S. (eds.) CAV 2011. LNCS, vol. 6806, pp. 649–655. Springer, Heidelberg (2011)
Sokolsky, O.V., Smolka, S.A.: Local model checking for real-time systems. In: Wolper, P. (ed.) CAV 1995. LNCS, vol. 939, pp. 211–224. Springer, Heidelberg (1995)
Wang, F.: Efficient verification of timed automata with BDD-like data structures. STTT 6(1), 77–97 (2004)
Wang, F.: Redlib for the formal verification of embedded systems. In: ISoLA 2006, pp. 341–346. IEEE Computer Society, Piscataway (2006)
Wang, F., Huang, G.D., Yu, F.: TCTL inevitability analysis of dense-time systems: From theory to engineering. IEEE Transactions on Software Engineering 32(7), 510–526 (2006)
Yovine, S.: KRONOS: a verification tool for real-time systems. STTT 1(1), 123–133 (1997)
Zhang, D., Cleaveland, W.R.: Fast generic model-checking for data-based systems. In: Wang, F. (ed.) FORTE 2005. LNCS, vol. 3731, pp. 83–97. Springer, Heidelberg (2005)
Zhang, D., Cleaveland, R.: Fast on-the-fly parametric real-time model checking. In: RTSS 2005, pp. 157–166. IEEE Computer Society, Washington, DC (2005)
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Fontana, P., Cleaveland, R. (2014). The Power of Proofs: New Algorithms for Timed Automata Model Checking. In: Legay, A., Bozga, M. (eds) Formal Modeling and Analysis of Timed Systems. FORMATS 2014. Lecture Notes in Computer Science, vol 8711. Springer, Cham. https://doi.org/10.1007/978-3-319-10512-3_9
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