Skip to main content
SpringerLink
Log in

Efficient verification of timed automata with BDD-like data structures

  • Special section on verification, model checking, and abstract interpretation
  • Published:
International Journal on Software Tools for Technology Transfer Aims and scope Submit manuscript

Abstract

We investigate the effect on efficiency of various design issues for BDD-like data structures of TA state space representation and manipulation. We find that the efficiency is highly sensitive to decision atom design and canonical form definition. We explore the two issues in detail and propose to use CRD (Clock-Restriction Diagram) for TA state space representation and present algorithms for manipulating CRD in the verification of TAs. We compare three canonical forms for zones, develop a procedure for quick zone-containment detection, and present algorithms for verification with backward reachability analysis. Three possible evaluation orderings are also considered and discussed. We implement our idea in our tool Red 4.2 and carry out experiments to compare with other tools and various strategies of Red in both forward and backward analysis. Finally, we discuss the possibility of future improvement.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. Asarin E, Bozga M, Kerbrat A, Maler O, Pnueli A, Rasse A (1997) Data-structures for the verification of timed automata. In: Proceedings of HART’97 (International Workshop on Hybrid And Real-Time Systems) 1997. Lecture notes in computer science, vol 1201. Springer, Berlin Heidelberg New York

  2. Alur R, Courcoubetis C, Dill DL (1990) Model checking for real-time systems. IEEE LICS (5th International Symposium on Logics in Computer Science), June 1990, Philadelphia, USA, IEEE Computer Society, pp 414–425

  3. Balarin F (1996) Approximate reachability analysis of timed automata. IEEE RTSS (17th IEEE Real-Time Sytems Symposium), December 1996, Washington D.C., USA, IEEE Computer Society, pp 52–61

  4. Burch JR, Clarke EM, McMillan KL, Dill DL, Hwang LJ (1990) Symbolic model checking: 1020 states and beyond. IEEE LICS (5th International Symposium on Logics in Computer Science), June 1990, Philadelphia, USA, IEEE Computer Society, pp 428–439

    Google Scholar 

  5. Bozga M, Daws C, Maler O (1998) Kronos: a model-checking tool for real-time systems. In: Proceedings of the 10th conference on computer-aided verification (CAV’98), June/July 1998. Lecture notes in computer science, vol 1427. Springer, Berlin Heidelberg New York

  6. Bengtsson J, Larsen K, Larsson F, Pettersson P, Wang Y (1996) UPPAAL – a tool suite for automatic verification of real-time systems. In: Proceedings of the hybrid control system symposium, 1996. Lecture notes in computer science. Springer, Berlin Heidelberg New York

  7. Behrmann G, Larsen KG, Pearson J, Weise C, Wang Y (1999) Efficient timed reachability analysis using clock difference diagrams. In: Proceedings of the conference on computer-aided verification (CAV’99), Trento, Italy, July 1999. Lecture notes in computer science, vol 1633. Springer, Berlin Heidelberg New York

  8. Bryant RE (1986) Graph-based algorithms for Boolean function manipulation. IEEE Trans Comput C-35(8)

  9. Dill DL (1989) Timing assumptions and verification of finite-state concurrent systems. In: Proceedings of the conference on computer-aided verification (CAV’89), 1989. Lecture notes in computer science, vol 407. Springer, Berlin Heidelberg New York

  10. Daws C, Olivero A, Tripakis S, Yovine S (1996) The tool KRONOS. In: Proceedings of the 3rd conference on hybrid systems, 1996. Lecture notes in computer science, vol 1066. Springer, Berlin Heidelberg New York

  11. Henzinger TA, Nicollin X, Sifakis J, Yovine S (1992) Symbolic model checking for real-time systems. IEEE LICS (7th International Symposium on Logics in Computer Science), Santa Cruz, USA, IEEE Computer Society, June 1992, pp 394–406

  12. Larsen KG, Larsson F, Pettersson P, Wang Y (1998) Efficient verification of real-time systems: compact data-structure and state-space reduction. IEEE RTSS (19th IEEE Real-Time Systems Symposium), Madrid, Spain, IEEE Computer Society, December 1998

  13. Moller J, Lichtenberg J, Andersen HR, Hulgaard H (1999) Difference decision diagrams. In: Proceedings of the annual conference of the European Association for Computer Science Logic (CSL), September 1999, Madrid, Spain

  14. Moller J, Lichtenberg J, Andersen HR, Hulgaard H (1999) Fully symbolic model-checking of timed systems using difference decision diagrams. In: Proceedings of the workshop on symbolic model-checking (SMC), July 1999, Trento, Italy

  15. Pettersson P, Larsen KG (2000) UPPAAL2k. Bull Eur Assoc Theor Comput Sci 70:40–44

    Google Scholar 

  16. Wang F (2000a) Efficient data-structure for fully symbolic verification of real-time software systems. In: Proceedings of the conference on tools and algorithms for the construction and analysis of systems (TACAS 2000), March 2000, Berlin. Lecture notes in computer science, vol 1785. Springer, Berlin Heidelberg New York

  17. Wang F (2000b) Region encoding diagram for fully symbolic verification of real-time systems. In: Proceedings of the the 24th COMPSAC (24th Computer Software and Applications Conference), October 2000, Taipei, Taiwan, ROC. IEEE Computer Society, IEEE Press, New York, pp 509–515

  18. Wang F (2001a) RED: Model-checker for timed automata with clock-restriction diagram. In: Proceedings of the workshop on real-time tools, August 2001. Technical Report 2001-014, ISSN 1404-3203, Department of Information Technology, Uppsala University, Uppsala, Sweden

  19. Wang F (2001b) Symbolic verification of complex real-time systems with clock-restriction diagram. In: Proceedings of FORTE’2001 (21st IFIP International Conference on Formal Techniques for Networked and Distributed Systems), August 2001, Cheju Island, Korea. Kluwer, Dordrecht, pp 235–250

  20. Wang F (2003) Symbolic parametric analysis of linear hybrid systems with BDD-like data-structures. ACM CoRR (Computing Research Repository, http://www.acm.org/corr/), user:cs.DS/0306113

  21. Wang F, Hsiung P-A (2002) Efficient and user-friendly verification. IEEE Trans Comput

  22. Wang F, Mok A, Emerson EA (1993) Symbolic model-checking for distributed real-time systems. In: Proceedings of the FME (1st International Symposium of Formal Methods Europe), April 1993, Odense, Denmark. Lecture notes in computer science, vol 670. Springer, Berlin Heidelberg New York, pp 632–651

  23. Wang F, Hwang G-D, Yu F (2003a) TCTL inevitability analysis of dense-time systems. In: Proceedings of the 8th conference on implementation and application of automata (CIAA), July 2003, Santa Barbara, CA. Lecture notes in computer science, vol 2759. Springer, Berlin Heidelberg New York

  24. Wang F, Hwang G-D, Yu F (2003b) Numerical coverage estimation for the symbolic simulation of real-time systems. To appear in the proceedings of FORTE’2003 (23rd IFIP International Conference on Formal Techniques for Networked and Distributed Systems), September–October 2003, Berlin. Lecture notes in computer science, vol 2767. Springer, Berlin Heidelberg New York, pp 160–176

  25. Yovine S (1997) Kronos: a verification tool for real-time systems. Int J Softw Tools Technol Transfer 1(1/2)

Download references

Author information

Authors and Affiliations

  1. Department of Electrical Engineering, National Taiwan University, 1, Sec. 4, Roosevelt Rd., Taipei, Taiwan, 106

    Farn Wang

Authors
  1. Farn Wang
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Farn Wang.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Wang, F. Efficient verification of timed automata with BDD-like data structures. Int J Softw Tools Technol Transfer 6, 77–97 (2004). https://doi.org/10.1007/s10009-003-0135-4

Download citation

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10009-003-0135-4

Keywords

Search

Navigation