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Revisiting Synthesis of GR(1) Specifications

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Hardware and Software: Verification and Testing (HVC 2010)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 6504))

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Abstract

The last few years have seen a rising interest in the problem of synthesizing systems from temporal logic specifications. One major contributor to this is the recent work of Piterman et al., which showed how polynomial time synthesis could be achieved for a class of LTL specifications that is large enough and expressive enough to cover an extensive number of complex, real-world, applications (despite a known doubly-exponential time lower bound for general LTL formulae). That approach has already been used extensively for the synthesis of various applications and as basis for further theoretical work on synthesis.

Here, we expose a fundamental flaw in the initial processing of specifications in that paper and demonstrate how it may produce incorrect results, declaring that specifications could not be synthesized when, in fact, they could. We then identify a class of specifications for which this initial processing is sound and complete. Thus, giving an insight to the reason that this problem arises in the first place. We also show that it can be easily checked whether specifications belong to the sound and complete class by using the same synthesis techniques. Finally, we show in the cases that specifications do not fall into this category how to modify them so that their processing is, indeed, both sound and complete.

Supported in part by National Science Foundation grant CNS-0720581.

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Authors and Affiliations

  1. Courant Institute of Mathematical Sciences, New York University, New York, NY, USA

    Uri Klein & Amir Pnueli

Authors
  1. Uri Klein
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  2. Amir Pnueli
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Editor information

Editors and Affiliations

  1. IBM Research - Haifa, Haifa University Campus, 31905, Mount Carmel, Haifa, Israel

    Sharon Barner  & Orna Raz  & 

  2. Department of Computer Science, University of California Irvine, Donald Bren Hall, Room 3088, 92697, Irvine, CA, USA

    Ian Harris

  3. Wolfson Building, Parks Road, OX1 3QD, Oxford, UK

    Daniel Kroening

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Klein, U., Pnueli, A. (2011). Revisiting Synthesis of GR(1) Specifications. In: Barner, S., Harris, I., Kroening, D., Raz, O. (eds) Hardware and Software: Verification and Testing. HVC 2010. Lecture Notes in Computer Science, vol 6504. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-19583-9_16

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  • DOI: https://doi.org/10.1007/978-3-642-19583-9_16

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-19582-2

  • Online ISBN: 978-3-642-19583-9

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