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Noise Analysis of Switched-Current Circuits

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Abstract

The understanding of noise in analog sampled data systems is vital for the design of high resolution circuitry in the discrete time domain. In this paper a general description of sampled and held noise is presened. The noise calculations are verified by measurements on an analog delay line implemented using switched-current (SI) technique. The SI delay line is based on a new topology current copier (CCOP). For the verification of the theory a new measurement technique is used. This technique enables one to measure the power spectral density of sampled and held noise which is below the continuous time noise floor.

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References

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Authors and Affiliations

  1. OTICON A/S, Strandvejen 58, 2900, Hellerup, Denmark

    Ivan H. H. Jørgensen & Gudmundur Bogason

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  1. Ivan H. H. Jørgensen
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  2. Gudmundur Bogason
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Jørgensen, I.H.H., Bogason, G. Noise Analysis of Switched-Current Circuits. Analog Integrated Circuits and Signal Processing 18, 69–77 (1999). https://doi.org/10.1023/A:1008355620630

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  • DOI: https://doi.org/10.1023/A:1008355620630

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