Abstract
This chapter provides an overview of BCD (Bipolar CMOS DMOS) process technologies which are devoted to realize smart power ICs for different applications in the automotive, industrial, computer peripherals, and personal electronics domains.
After an initial overview of the possible isolation schemes and their reflection on the BCD platform differentiation, a description of the BCD technology architecture, compared to more standard CMOS processes, is presented.
Focus is then given on the technology enablers which are driving the innovation in order to meet the evolution of the applications.
The increase of digital processing capability and the need for embedded nonvolatile memories enabled by the minimum lithography reduction and by new emerging memory technologies are first discussed.
Then the requirements for more efficient and robust high voltage and high current power stages and the demands coming from analog functions are described showing power component architectures and innovations in the metal and dielectric layers which need to withstand very high currents and thermomechanical stresses.
The section on new technology enablers ends up with the presentation of passive modules to address specific analog and high voltage applications.
Finally, the future trends and challenges for BCD technology development are summarized.
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Croce, G., Andreini, A., Galbiati, P., Diazzi, C. (2023). BCD Process Technologies. In: Rudan, M., Brunetti, R., Reggiani, S. (eds) Springer Handbook of Semiconductor Devices . Springer Handbooks. Springer, Cham. https://doi.org/10.1007/978-3-030-79827-7_3
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