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RunFein: a rapid prototyping framework for Feistel and SPN-based block ciphers

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Abstract

Block ciphers are the most prominent symmetric-key cryptography kernels, serving as fundamental building blocks to many other cryptographic functions. This work presents RunFein, a tool for rapid prototyping of a major class of block ciphers, namely product ciphers (including Feistel network and Substitution permutation network-based block ciphers). RunFein accepts the algorithmic configuration of an existing/new block cipher from the user through a GUI to generate a customized software implementation. The user may choose from various micro-architectural templates (unrolled, pipelined, sub-pipelined) to generate an HDL description of the cipher. Various modes of operation and the NIST test suite may also be included. This high-level design approach eliminates the laborious and repetitive development efforts for VLSI realizations of block ciphers. It allows a quick design exploration, consequently enabling fast benchmarking in terms of critical resource estimation of various versions/configurations of a cipher that varies in terms of security, complexity and performance. Using RunFein, we have successfully implemented some well-known product ciphers and benchmarked their performance without significant degradation against their published hand-crafted implementations in literature.

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References

  1. Khalid, A., Hassan, M., Chattopadhyay, A., Paul, G.: RAPID-FeinSPN: a rapid prototyping framework for Feistel and SPN-based block ciphers. In: Information Systems Security, pp. 169–190. Springer, Berlin (2013)

  2. Maitra, S., Paul, G.: Analysis of RC4 and proposal of additional layers for better security margin. In: Progress in Cryptology-INDOCRYPT, pp. 27–39. Springer, Berlin (2008)

  3. Break DES in less than a single day. In: Press Release Demonstrated at a 2009 Workshop. Available at http://www.sciengines.com/company/news-a-events/74-des-in-1-day.html

  4. Aumasson, J., Henzen, L., Meier, W., Phan, R.: SHA-3 Proposal BLAKE Version 1.3. Submission to NIST. Available at https://www.131002.net/blake

  5. Bogdanov, A., Knudsen, L.R., Le, G., Paar, C., Poschmann, A., Robshaw, M.J.B., Seurin, Y., Vikkelsoe, C.: PRESENT: an ultra-lightweight block cipher. In: Proceedings of CHES (2007)

  6. Bernstein, D.J.: The Salsa20 family of stream ciphers. In: New Stream Cipher Designs: The eSTREAM Finalists, pp. 84–97. Springer, Berlin (2008)

  7. Announcing Development of a Federal Information Processing Standard for Advanced Encryption Standard. National Institute of Standards and Technology, Docket No. 960924272-6272-01, RIN 0693-ZA13 (1997). http://csrc.nist.gov/archive/aes/pre-round1/aes_9701.txt

  8. NESSIE: New European Schemes for Signatures, Integrity, and Encryption IST-1999-12324 (2000). https://www.cosic.esat.kuleuven.be/nessie/

  9. CRYPTREC: Cryptography Research and Evaluation Committees. Japanese Government Cryptographer Competition (2012). http://competitions.cr.yp.to/cryptrec.html

  10. eSTREAM: the ECRYPT Stream Cipher Project. Available at http://www.ecrypt.eu.org/stream

  11. SHA-3 Cryptographic Hash Algorithm Competition. NIST competition for Secure Hash Algorithm (2007). http://csrc.nist.gov/groups/ST/hash/sha-3/index.html

  12. CAESAR: Competition for Authenticated Encryption: Security, Applicability, and Robustness. A Portfolio of Authenticated Ciphers (2013). Available at http://competitions.cr.yp.to/caesar.html

  13. Third Round Report of the SHA-3 Cryptographic Hash Algorithm Competition. National Institute of Standards and Technology, NISTIR 7896 (2012). Available at http://nvlpubs.nist.gov/nistpubs/ir/2012/NIST.IR.7896

  14. Batina, L., Lano, J., Mentens, N., Ors, S.B., Preneel, B., Verbauwhede, I.: Energy, performance, area versus security trade-offs for stream ciphers. In: The State of the Art of Stream Ciphers, ECRYPT Workshop Record, pp. 302–310 (2004)

  15. Chattopadhyay, A., Paul, G.: Exploring security-performance trade-offs during hardware accelerator design of stream cipher RC4. In: VLSI and System-on-Chip (VLSI-SoC), 2012 IEEE/IFIP 20th International Conference on. IEEE (2012)

  16. Synphony C Compiler: Optimized Hardware from High-Level C/C++. Synopsys (2010). Available at https://www.synopsys.com/Tools/Implementation/RTLSynthesis/Documents/synphonyc-compiler-ds

  17. Philippe Coussy and Dominique Heller. GAUT—High-Level Synthesis Tool From C to RTL. Available at hls-labsticc.univ-ubs.fr/

  18. Vivado Design Suite User Guide: High-Level Synthesis Xilinx (2015). Available at http://www.xilinx.com/support/documentation/sw_manuals/xilinx2015_1/ug902-vivado-high-level-synthesis

  19. Calypto Design Systems. Catapult High Level Synthesis (2011). Available at http://calypto.com

  20. High-Level Synthesis Tool—LegUp. University of Toronto (2013). Available at http://legup.eecg.utoronto.ca/

  21. Burns, F., Murphy, J., Shang, D., Koelmans, A., Yakorlev, A.: Dynamic global security-aware synthesis using SystemC. IET Comput. Digit. Tech. 1, 405–413 (2007)

    Article  Google Scholar 

  22. Ahuja, S., Gurumani, S.T., Spackman, C., Shukla, S.K.: Hardware coprocessor synthesis from an ANSI C specification. IEEE Des. Test Comput. 4, 58–67 (2009)

    Article  Google Scholar 

  23. Homsirikamol, E., Gaj, K.: Hardware benchmarking of cryptographic algorithms using high-level synthesis tools: the SHA-3 contest case study. In: Applied Reconfigurable Computing (ARC), pp. 217–228. IEEE (2015)

  24. Homsirikamol, E., Gaj, K.: Can high-level synthesis compete against a hand-written code in the cryptographic domain? A case study. In: International Conference on ReConFigurable Computing and FPGAs (ReConFig), pp. 1–8. IEEE (2014)

  25. Asanovic, K., Bodik, R., Catanzaro, B.C., Gebis, J.J., Husbands, P., Keutzer, K., Patterson, D.A., Plishker, W.L., Shalf, J., Williams, S.W., Yelick, K.A.: The Landscape of Parallel Computing Research: A View from Berkeley. UCB/EECS-2006-183, EECS Department, University of California, Berkeley

  26. Dubey, P.: Teraflops for the masses: Killer apps of tomorrow. In: Workshop on Edge Computing Using New Commodity Architectures (UNC), vol. 23 (2006)

  27. Ernst, M., Klupsch, S., Hauck, O., Huss, S.A.: Rapid prototyping for hardware accelerated elliptic curve public-key cryptosystems. In: Proceedings of the 12th International Workshop on Rapid System Prototyping (RSP ’01) (2001)

  28. Leurent, G.: ARX Toolkit. Available at http://www.di.ens.fr/leurent/arxtools.html

  29. Mouha, N., Velichkov, V., De Canniére, C., Preneel, B.: S-function Toolkit. Available at http://www.ecrypt.eu.org/tools/s-function-toolkit

  30. Akinyele, J.A., et al.: Charm: a framework for rapidly prototyping cryptosystems. J. Cryptogr. Eng. 3(2), 111–128 (2013)

  31. Lacy, J.B., Mitchell, D.P., Schell, W.M.: CryptoLib: cryptography in software. In: Proceedings of the Fourth USENIX Security Workshop, pp. 1–18 (1993)

  32. Shahzad, K., Khalid, A., Rákossy, Z.E., Paul, G., Chattopadhyay, A.: CoARX: a coprocessor for ARX-based cryptographic algorithms. In: Proceedings of the 50th Annual Design Automation Conference (DAC ’13) (2013). doi:10.1145/2463209.2488898

  33. Dworkin, M.: Recommendation for block cipher modes of operation. Methods and techniques. In: NIST Special Publication 800-38A (2001)

  34. Berbain, C., Billet, O., Canteaut, A., Courtois, N., Gilbert, H., Goubin, L., Gouget, A., Granboulan, L., Lauradoux, C., Minier, M., Pornin, T., Sibert, H.: Sosemanuk a fast software-oriented stream cipher. In: New Stream Cipher Designs: The eSTREAM Finalists, pp. 98–118. Springer, Berlin (2008)

  35. Barreto, P., Rijmen, V.: The Whirlpool hashing function. In: First open NESSIE Workshop, vol. 13, pp. 14–33. Leuven (2000)

  36. Ferguson, N., Lucks, S., Schneier, B., Whiting, D., Bellare, M., Kohno, T., Callas, J., Walker, J.: The Skein Hash Function Family, Version 1.3. http://www.skein-hash.info/sites/default/files/skein1.3 (2010)

  37. Authenticated Encryption-Security Techniques. In: ISO/IEC 19772:2009. Retrieved March 12 (2013)

  38. Menezes, A.J., Van Oorschot, P.C., Vanstone, S.A.: Handbook of Applied Cryptography. CRC Press, Boca Raton, FL (1996)

    Book  MATH  Google Scholar 

  39. Khovratovich, D., Nikolić, I.: Rotational cryptanalysis of ARX. In: Fast Software Encryption 2010, LNCS vol. 6147, pp. 333–346. Springer, Berlin (2010)

  40. Weinmann, R.-P.: AXR—Crypto Made from Modular Additions, XORs. In: Dagstuhl Seminar 09031, January 2009. Available at http://www.dagstuhl.de/Materials/Files/09/09031/09031.WeinmannRalfPhilipp.Slides

  41. Wu, H.: The Stream Cipher HC-128. Available at http://www.ecrypt.eu.org/stream/p3ciphers/hc/hc128_p3

  42. Rivest, R.: The MD5 Message-Digest Algorithm. In: RFC 1321 by MIT Laboratory for Computer Science and RSA Data Security (1992). Available at http://www.faqs.org/rfcs/rfc1321.html

  43. Secure Hash Standard (SHS) In FIPS PUB 180-4, Information Technology Laboratory National Institute of Standards and Technology Gaithersburg (2012). Available at http://csrc.nist.gov/publications/fips/fips180-4/fips-180-4

  44. Bertoni, G., Daemen, J., Peeters, M., Van Assche, G.: Keccak Sponge Function Family (Main Document). Submission to NIST, round 3 (2011)

  45. Advanced Encryption Standard. Federal Information Processing Standard, FIPS-197, p. 12 (2001)

  46. Wheeler, D.J., Needham, R.M.: TEA, a tiny encryption algorithm. In: Fast Software Encryption, pp. 363–366. Springer, Berlin (1995)

  47. Iwata, T., Shibutani, K., Shirai, T., Moriai, S., Akishita, T.: AURORA: A Cryptographic Hash Algorithm Family. Submission to NIST (2008)

  48. Rukhin, A., Soto, J., Nechvatal, J., Smid, M., Barker, E.: A Statistical Test Suite for the Validation of Random Number Generators and Pseudo Random Number Generators for Cryptographic Applications. NIST Special Publication 800-22. Available at csrc.nist.gov/groups/ST/toolkit/rng/documents/SP800-22b

  49. Synopsys Processor Designer. Available at http://www.synopsys.com/Systems/BlockDesign/processorDev/Pages/default.aspx

  50. Chattopadhyay, A., Meyr, H., Leupers, R.: LISA: a uniform ADL for embedded processor modelling, implementation and software toolsuite generation. In: Mishra, P., Dutt, N. (eds.) Processor Description Languages, pp. 95–130. Morgan Kaufmann, Los Altos, CA (2008)

    Chapter  Google Scholar 

  51. Rolfes, C., Poschmann, A., Leander, G., Paar, C.: Ultra-lightweight implementations for smart devicessecurity for 1000 gate equivalents. In: Smart Card Research and Advanced Applications, pp. 89–103. Springer, Berlin (2008)

  52. Moradi, A., Poschmann, A., Ling, S., Paar, C., Wang, H.: Pushing the limits: a very compact and a threshold implementation of AES. In: Advances in Cryptology–EUROCRYPT 2011, pp. 69–88. Springer, Berlin (2011)

  53. Simple AES (Rijndael) IP Core http://opencores.org/project,aes_core

  54. Satoh, A., Morioka, S., Takano, K., Munetoh, S.: A compact Rijndael hardware architecture with S-box optimization. In: Advances in Cryptology–ASIACRYPT 2001, pp. 239–254. Springer, Berlin (2001)

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Correspondence to Goutam Paul.

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This is an extended version of the conference paper by Khalid et al. [1], presented at ICISS 2013. Sections 1236 and 7 are based on [1] with major revision, novel extension and significant refinement. Sections 4 and 5 are completely new technical contributions in this work.

Appendix

Appendix

We present here some GUI snapshots of various tabs of the RunFein tool. CRYKET (CRYptographic Kernels Toolkit) caters to rapid prototyping of various cryptographic functions while RunFein is an instance of it dealing with block ciphers (Figs. 16, 17, 18).

Fig. 16
figure 16

Round layers operational specification for AES-128 in RunFein

Fig. 17
figure 17

NIST Test suite parameter selection tab in RunFein

Fig. 18
figure 18

Microarchitectural specification for subpipelined implementation in RunFein (\(+\) pipe specifies pipeline)

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Khalid, A., Hassan, M., Paul, G. et al. RunFein: a rapid prototyping framework for Feistel and SPN-based block ciphers. J Cryptogr Eng 6, 299–323 (2016). https://doi.org/10.1007/s13389-016-0116-7

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