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Stacking Fault Expansion from an Interfacial Dislocation in a 4H-SiC PIN Diode and Its Expansion Process

  • Topical Collection: 19th Conference on Defects (DRIP XIX)
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Abstract

A stacking fault (SF) that expanded from an interfacial dislocation (ID), which was formed from a basal plane dislocation (BPD) during high-temperature annealing, and its expansion process were investigated by electroluminescence imaging during a current stress test, and by various crystal analyses. The SF was observed during electroluminescence observation of PIN diodes that had line-and-space anodes with open windows. The SF started to expand from the surface side of the ID at low current densities, changed its shape variously, and finally became a parallelogram. A dislocation line inside the expanded parallelogram-shaped SF indicated that the origin was not a single BPD. Cross-sectional high-resolution transmission electron microscopy revealed another SF that was a (3 2 1 2) stacking structure between two single Shockley stacking fault (1SSF) regions at that dislocation line. In addition, the tetrahedra of the two 1SSFs were face-to-face and were offset by two layers. This result means that the original structure of the 1SSFs was a BPD-threading edge dislocation (TED) structure with two BPD segments. The two BPD segments had rotational twin-like structures forming a dislocation loop with each other and the TED between them was present in only two layers. A crystallographic analysis to investigate the expansion mechanism showed consistent results, with the two types of dislocation loops and extinction of the same types of partial dislocations of the Si-core and the C-core.

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Acknowledgments

The SXRT experiments were performed at SAGA-LS.

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Authors and Affiliations

  1. Corporate Research and Development Center, Toshiba Corporation, 1 Komukai Toshiba-cho, Saiwai-ku, Kawasaki, 212-8582, Japan

    Chiharu Ota, Johji Nishio, Aoi Okada & Ryosuke Iijima

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  1. Chiharu Ota
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Ota, C., Nishio, J., Okada, A. et al. Stacking Fault Expansion from an Interfacial Dislocation in a 4H-SiC PIN Diode and Its Expansion Process. J. Electron. Mater. 52, 5109–5120 (2023). https://doi.org/10.1007/s11664-023-10440-8

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