Abstract
This paper presents the successful use of ZnS/ZnMgS and other II–VI layers (lattice-matched or pseudomorphic) as high-k gate dielectrics in the fabrication of quantum dot (QD) gate Si field-effect transistors (FETs) and nonvolatile memory structures. Quantum dot gate FETs and nonvolatile memories have been fabricated in two basic configurations: (1) monodispersed cladded Ge nanocrystals (e.g., GeO x -cladded-Ge quantum dots) site-specifically self-assembled over the lattice-matched ZnMgS gate insulator in the channel region, and (2) ZnTe-ZnMgTe quantum dots formed by self-organization, using metalorganic chemical vapor-phase deposition (MOCVD), on ZnS-ZnMgS gate insulator layers grown epitaxially on Si substrates. Self-assembled GeO x -cladded Ge QD gate FETs, exhibiting three-state behavior, are also described. Preliminary results on InGaAs-on-InP FETs, using ZnMgSeTe/ZnSe gate insulator layers, are presented.
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Acknowledgements
This work is supported in part by ONR Contracts N00014-02-1-0883 and N00014-06-1-0016, and NSF Grants EEC 0407279 (NUE) and ECS 0622068. Discussions with Dr. D. Purdy (ONR) and Dr. R. Khosla (NSF), and technical assistance in processing by Dr. R. Velampati (Intel) and Dr. A. Rodriguez (Intel) are gratefully acknowledged.
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Jain, F.C., Suarez, E., Gogna, M. et al. Novel Quantum Dot Gate FETs and Nonvolatile Memories Using Lattice-Matched II–VI Gate Insulators. J. Electron. Mater. 38, 1574–1578 (2009). https://doi.org/10.1007/s11664-009-0755-x
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DOI: https://doi.org/10.1007/s11664-009-0755-x